参数资料
型号: B80547RE061256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 2530 MHz, MICROPROCESSOR, PBGA775
封装: FLIP CHIP, LGA-775
文件页数: 21/94页
文件大小: 2796K
代理商: B80547RE061256
28
Datasheet
Electrical Specifications
Table 2-10. GTL+ Asynchronous Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
IL
Input Low Voltage
0.0
VTT/2 – (0.10 * VTT)—
2, 3
2.
VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3.
LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals
VIH = GTLREF + (0.10 * VTT) and VIL= GTLREF – (0.10 * VTT).
V
IH
Input High Voltage
VTT/2 + (0.10 * VTT)VTT
3, 4, 5, 6
4.
VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5.
VIH and VOH may experience excursions above VTT.
6.
The VTT referred to in these specifications refers to instantaneous VTT.
V
OH
Output High Voltage
0.90*VTT
VTT
V
5, 6, 7
7.
All outputs are open drain.
I
OL
Output Low Current
VTT/[(0.50*RTT_MIN) + RON_MIN]A
8
8.
The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test
load.
I
LI
Input Leakage Current
N/A
± 200
A
9
9.
Leakage to VSS with land held at VTT.
I
LO
Output Leakage
Current
N/A
± 200
A
10
10.
Leakage to VTT with land held at 300 mV.
R
ON
Buffer On Resistance
8
12
Ω
Table 2-11. GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
IL
Input Low Voltage
0.0
GTLREF – (0.10 * VTT)V
2, 3
2.
VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3.
The VTT referred to in these specifications is the instantaneous VTT.
V
IH
Input High Voltage
GTLREF + (0.10 * VTT)VTT
V
3, 4, 5
4.
VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
V
OH
Output High Voltage
0.90*VTT
VTT
V
5.
VIH and VOH may experience excursions above VTT.
I
OL
Output Low Current
N/A
VTT/[(0.50*RTT_MIN) + RON_MIN]A
-
I
LI
Input Leakage
Current
N/A
± 200
A
6
6.
Leakage to VSS with land held at VTT.
I
LO
Output Leakage
Current
N/A
± 200
A
R
ON
Buffer On Resistance
8
12
Ω
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