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参数资料
| 型号： | B80547RE061256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 2530 MHz, MICROPROCESSOR, PBGA775 |
| 封装： | FLIP CHIP, LGA-775 |
| 文件页数： | 66/94页 |
| 文件大小： | 2796K |
| 代理商： | B80547RE061256 |
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Datasheet
69
Land Listing and Signal Descriptions
THERMTRIP#
Output
In the event of a catastrophic cooling failure, the processor will
automatically shut down when the silicon has reached a temperature
approximately 20 °C above the maximum TC. Assertion of THERMTRIP#
(Thermal Trip) indicates the processor junction temperature has reached a
level beyond which permanent silicon damage may occur. Upon assertion
of THERMTRIP#, the processor will shut off its internal clocks (thus halting
program execution) in an attempt to reduce the processor junction
temperature. To protect the processor, its core voltage (VCC) must be
removed following the assertion of THERMTRIP#. Driving of the
THERMTRIP# signal is enabled within 10
μs of the assertion of
PWRGOOD and is disabled on de-assertion of PWRGOOD. Once
activated, THERMTRIP# remains latched until PWRGOOD is de-asserted.
While the de-assertion of the PWRGOOD signal will de-assert
THERMTRIP#, if the processor’s junction temperature remains at or above
the trip level, THERMTRIP# will again be asserted within 10
μs of the
assertion of PWRGOOD.
TMS
Input
TMS (Test Mode Select) is a JTAG specification support signal used by
debug tools.
TRDY#
Input
TRDY# (Target Ready) is asserted by the target to indicate that it is ready
to receive a write or implicit writeback data transfer. TRDY# must connect
the appropriate pins/lands of all FSB agents.
TRST#
Input
TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must
be driven low during power on Reset.
VCC
Input
VCC are the power pins for the processor. The voltage supplied to these
pins is determined by the VID[5:0] pins.
VCCA
Input
VCCA provides isolated power for the internal processor core PLLs.
VCCIOPLL
Input
VCCIOPLL provides isolated power for internal processor FSB PLLs.
Follow the guidelines for VCCA.
VCC_SENSE
Output
VCC_SENSE is an isolated low impedance connection to processor core
power (VCC). It can be used to sense or measure voltage near the silicon
with little noise.
VCC_MB_REGULATION
Output
This land is provided as a voltage regulator feedback sense point for VCC.
It is connected internally in the processor package to the sense point land
U27 as described in the Voltage Regulator-Down (VRD) 10.1 Design Guide
for Desktop Socket 775.
VID[7:0]
Output
VID[7:6] (Voltage ID) are not used by the Celeron D processor in the 775-
Land package. These signals are included here for future processor
compatibility.
VID[5:0] (Voltage ID) signals are used to support automatic selection of
power supply voltages (VCC). These are open drain signals that are driven
by the Celeron D processor in the 775-land package and must be pulled up
on the motherboard. Refer to the Voltage Regulator-Down (VRD) 10.1
Design Guide for Desktop Socket 775 for more information. The voltage
supply for these signals must be valid before the VR can supply VCC to the
processor. Conversely, the VR output must be disabled until the voltage
supply for the VID signals becomes valid. The VID signals are needed to
support the processor voltage specification variations. See Table 2-2 for
definitions of these signals. The VR must supply the voltage that is
requested by the signals, or disable itself.
VID_SELECT
Output
VID_SELECT is used to select the VID table that is to be used by the
voltage regulator.
Table 4-3. Signal Description (Sheet 8 of 9)
Name
Type
Description
VID_SELECT
VR Table Used
L
VRD10.1
H
VRD11
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