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Intel Xeon Processor with 512 KB L2 Cache
Datasheet
83
1. These are “Reserved” pins on the Intel Xeon processor. In
systems utilizing the Intel Xeon processor, the system
designer must terminate these signals to the processor VCC.
2. Baseboards treating AA3 and AB3 as Reserved will operate
correctly with a bus clock of 100 MHz.
AC20
D25#
Source Sync
Input/Output
AC21
D26#
Source Sync
Input/Output
AC22
VCC
Power/Other
AC23
D23#
Source Sync
Input/Output
AC24
D20#
Source Sync
Input/Output
AC25
VSS
Power/Other
AC26
D17#
Source Sync
Input/Output
AC27
DBI0#
Source Sync
Input/Output
AC28
SM_CLK
SMBus
Input
AC29
SM_DAT
SMBus
Output
AC30
VSS
Power/Other
AC31
VCC
Power/Other
AD1
Reserved
AD2
VCC
Power/Other
AD3
VSS
Power/Other
AD4
VCCIOPLL
Power/Other
Input
AD5
TESTHI5
Power/Other
Input
AD6
VCC
Power/Other
AD7
D57#
Source Sync
Input/Output
AD8
D46#
Source Sync
Input/Output
AD9
VSS
Power/Other
AD10
D45#
Source Sync
Input/Output
AD11
D40#
Source Sync
Input/Output
AD12
VCC
Power/Other
AD13
D38#
Source Sync
Input/Output
AD14
D39#
Source Sync
Input/Output
AD15
VSS
Power/Other
AD16
COMP0
Power/Other
Input
AD17
VSS
Power/Other
AD18
D36#
Source Sync
Input/Output
AD19
D30#
Source Sync
Input/Output
AD20
VCC
Power/Other
AD21
D29#
Source Sync
Input/Output
AD22
DBI1#
Source Sync
Input/Output
AD23
VSS
Power/Other
AD24
D21#
Source Sync
Input/Output
AD25
D18#
Source Sync
Input/Output
Table 39. Pin Listing by Pin Number
Pin No.
Pin Name
Signal
Buffer Type
Direction
AD26
VCC
Power/Other
AD27
D4#
Source Sync
Input/Output
AD28
SM_ALERT#
SMBus
Output
AD29
SM_WP
SMBus
Input
AD30
VCC
Power/Other
AD31
VSS
Power/Other
AE2
VSS
Power/Other
AE3
VCC
Power/Other
AE4
Reserved
AE5
TESTHI6
Power/Other
Input
AE6
SLP#
Async GTL+
Input
AE7
D58#
Source Sync
Input/Output
AE8
VCC
Power/Other
AE9
D44#
Source Sync
Input/Output
AE10
D42#
Source Sync
Input/Output
AE11
VSS
Power/Other
AE12
DBI2#
Source Sync
Input/Output
AE13
D35#
Source Sync
Input/Output
AE14
VCC
Power/Other
AE15
Reserved
AE16
Reserved
AE17
DP3#
Common Clk
Input/Output
AE18
VCC
Power/Other
AE19
DP1#
Common Clk
Input/Output
AE20
D28#
Source Sync
Input/Output
AE21
VSS
Power/Other
AE22
D27#
Source Sync
Input/Output
AE23
D22#
Source Sync
Input/Output
AE24
VCC
Power/Other
AE25
D19#
Source Sync
Input/Output
AE26
D16#
Source Sync
Input/Output
AE27
VSS
Power/Other
AE28
SM_VCC
Power/Other
AE29
SM_VCC
Power/Other
Table 39. Pin Listing by Pin Number
Pin No.
Pin Name
Signal
Buffer Type
Direction