参数资料
型号: BX80532KE2000D
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 2000 MHz, MICROPROCESSOR, XMA
文件页数: 61/102页
文件大小: 1464K
代理商: BX80532KE2000D
Intel Xeon Processor with 533 MHz Front Side Bus at 2 GHz to 3.06 GHz
61
BINIT#
I/O
BINIT# (Bus Initialization) may be observed and driven by all processor front side
bus agents and if used, must connect the appropriate pins of all such agents. If the
BINIT# driver is enabled during power on configuration, BINIT# is asserted to signal
any bus condition that prevents reliable future information.
If BINIT# observation is enabled during power-on configuration (see Section 6.1)
and BINIT# is sampled asserted, symmetric agents reset their bus LOCK# activity
and bus request arbitration state machines. The bus agents do not reset their IOQ
and transaction tracking state machines upon observation of BINIT# assertion.
Once the BINIT# assertion has been observed, the bus agents will re-arbitrate for
the front side bus and attempt completion of their bus queue and IOQ entries.
If BINIT# observation is disabled during power-on configuration, a central agent
may handle an assertion of BINIT# as appropriate to the error handling architecture
of the system.
4
BNR#
I/O
BNR# (Block Next Request) is used to assert a bus stall by any bus agent who is
unable to accept new bus transactions. During a bus stall, the current bus owner
cannot issue any new transactions.
Since multiple agents might need to request a bus stall at the same time, BNR# is a
wire-OR signal which must connect the appropriate pins of all processor front side
bus agents. In order to avoid wire-OR glitches associated with simultaneous edge
transitions driven by multiple drivers, BNR# is activated on specific clock edges and
sampled on specific clock edges.
4
BPM[5:0]#
I/O
BPM[5:0]# (Breakpoint Monitor) are breakpoint and performance monitor signals.
They are outputs from the processor which indicate the status of breakpoints and
programmable counters used for monitoring processor performance. BPM[5:0]#
should connect the appropriate pins of all front side bus agents.
BPM4# provides PRDY# (Probe Ready) functionality for the TAP port. PRDY# is a
processor output used by debug tools to determine processor debug readiness.
BPM5# provides PREQ# (Probe Request) functionality for the TAP port. PREQ# is
used by debug tools to request debug operation of the processors.
BPM[5:4]# must be bussed to all bus agents.
These signals do not have on-die termination and must be terminated at the
end agent. See the appropriate platform design guidelines for additional
information.
3
BPRI#
I
BPRI# (Bus Priority Request) is used to arbitrate for ownership of the processor
front side bus. It must connect the appropriate pins of all processor front side bus
agents. Observing BPRI# active (as asserted by the priority agent) causes all other
agents to stop issuing new requests, unless such requests are part of an ongoing
locked operation. The priority agent keeps BPRI# asserted until all of its requests
are completed, then releases the bus by deasserting BPRI#.
4
Table 41. Signal Definitions (Sheet 2 of 9)
Name
Type
Description
Notes
相关PDF资料
PDF描述
BX80532KC1900E 1900 MHz, MICROPROCESSOR
BU-61582D0-290S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
BU-61582D0-300K 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
BU-61582D1-391Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
BU-61582D1-410S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
相关代理商/技术参数
参数描述
BX80532KE2000DU 制造商:Intel 功能描述:XEON 2.0GHZ 533FSB 1U - Boxed Product (Development Kits)
BX80532KE2400DSL73L 制造商:Intel 功能描述:
BX80532KE2400E 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.4GHZ - Boxed Product (Development Kits)
BX80532KE2400EU 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.4GHZ - Boxed Product (Development Kits)
BX80532KE2667D 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.66GHZ - Boxed Product (Development Kits)