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参数资料
| 型号： | BX805555080A |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, MICROPROCESSOR, BGA771 |
| 封装： | LGA-771 |
| 文件页数： | 13/104页 |
| 文件大小： | 3690K |
| 代理商： | BX805555080A |
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Electrical Specifications
16
Dual-Core Intel Xeon Processor 5000 Series Datasheet
2.3
Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the Dual-Core
Intel Xeon Processor 5000 series are capable of generating large average current
swings between low and full power states. This may cause voltages on power planes to
sag below their minimum values if bulk decoupling is not adequate. Larger bulk storage
(CBULK), such as electrolytic capacitors, supply current during longer lasting changes in
current demand by the component, such as coming out of an idle condition. Similarly,
they act as a storage well for current when entering an idle condition from a running
condition. Care must be taken in the baseboard design to ensure that the voltage
provided to the processor remains within the specifications listed in Table 2-10. Failure
to do so can result in timing violations or reduced lifetime of the component. For further
information and guidelines, refer to the appropriate platform design guidelines.
2.3.1
VCC Decoupling
Vcc regulator solutions need to provide bulk capacitance with a low Effective Series
Resistance (ESR), and the baseboard designer must assure a low interconnect
resistance from the regulator (EVRD or VRM pins) to the LGA771 socket. Bulk
decoupling must be provided on the baseboard to handle large current swings. The
power delivery solution must insure the voltage and current specifications are met (as
defined in Table 2-10). For further information regarding power delivery, decoupling
and layout guidelines, refer to the appropriate platform design guidelines.
2.3.2
VTT Decoupling
Bulk decoupling must be provided on the baseboard. Decoupling solutions must be
sized to meet the expected load. To insure optimal performance, various factors
associated with the power delivery solution must be considered including regulator
type, power plane and trace sizing, and component placement. A conservative
decoupling solution consists of a combination of low ESR bulk capacitors and high
frequency ceramic capacitors. For further information regarding power delivery,
decoupling and layout guidelines, refer to the appropriate platform design guidelines.
2.3.3
Front Side Bus AGTL+ Decoupling
The Dual-Core Intel Xeon Processor 5000 series integrate signal termination on the die,
as well as a portion of the required high frequency decoupling capacitance on the
processor package. However, additional high frequency capacitance must be added to
the baseboard to properly decouple the return currents from the FSB. Bulk decoupling
must also be provided by the baseboard for proper AGTL+ bus operation. Decoupling
guidelines are described in the appropriate platform design guidelines.
2.4
Front Side Bus Clock (BCLK[1:0]) and Processor
Clocking
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the
processor. As in previous processor generations, the Dual-Core Intel Xeon Processor
5000 series core frequency is a multiple of the BCLK[1:0] frequency. The processor bus
ratio multiplier is set during manufacturing. The default setting is for the maximum
speed of the processor. It is possible to override this setting using software (see the
IA-32 Intel Architecture Software Developer’s Manual, Volume 3A &3B). This permits
operation at lower frequencies than the processor’s tested frequency.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BX805565120P S L9RY | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5120 RISC 64-Bit 65nm 1.86GHz 771-Pin LGA Box |
| BX805565130A S LAGC | 制造商:Intel 功能描述:5100 MEMORY CONTROLLER HUB CHIPSET |
| BX805565140P S LABN | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5140 RISC 64-Bit 65nm 2.33GHz 1.35V/1.5V 771-Pin FCLGA6 Box |
| BX805565148A S LABH | 制造商:Intel 功能描述:MPU Xeon |
| BX805565160A S L9RT | 制造商:Intel 功能描述:MPU Xeon? Processor 5160 RISC 64-Bit 65nm 3GHz 1.35V/1.5V 771-Pin FCLGA6 Box |
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