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| 型号： | DAC5687IPZP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100 |
| 封装： | GREEN, PLASTIC, HTQFP-100 |
| 文件页数： | 48/79页 |
| 文件大小： | 2490K |
| 代理商： | DAC5687IPZP |
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Analog Current Outputs
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
The full-scale output current is set using external resistor RBIAS in combination with an on-chip band-gap voltage
reference source (1.2 V) and control amplifier. Current IBIAS through resistor RBIAS is mirrored internally to provide
a full-scale output current equal to 16 times IBIAS. The full-scale current IOUTFS can be adjusted from 20 mA
down to 2 mA.
The relation between IOUT1 and IOUT2 can be expressed as:
IOUT1 = –IOUTFS – IOUT2
Current flowing into a node is denoted as – current, and current flowing out of a node as + current. Because the
output stage is a current sink, the current can only flow from AVDD into the IOUT1 and IOUT2 pins. If IOUT2 =
–5 mA and IOUTFS = 20 mA then:
IOUT1 = –20 – (–5) = –15 mA
The output current flow in each pin driving a resistive load can be expressed as:
IOUT1 = IOUTFS × CODE / 65,536
IOUT2 = IOUTFS × (65,535 – CODE) / 65,536
where CODE is the decimal representation of the DAC data input word.
For the case where IOUT1 and IOUT2 drive resistor loads RL directly, this translates into single-ended voltages
at IOUT1 and IOUT2:
VOUT1 = AVDD – | IOUT1 |
× R
L
VOUT2 = AVDD – | IOUT2 |
× R
L
Assuming that the data is full scale (65,535 in offset binary notation) and RL is 25 , the differential voltage
between pins IOUT1 and IOUT2 can be expressed as:
VOUT1 = AVDD – | –20 mA |
× 25 = 2.8 V
VOUT2 = AVDD – | –0 mA |
× 25 = 3.3 V
VDIFF = VOUT1 – VOUT2 – 0.5 V
Note that care should be taken not to exceed the compliance voltages at node IOUT1 and IOUT2, which would
lead to increased signal distortion.
Figure 59 shows a simplified schematic of the current source array output with corresponding switches.
Differential switches direct the current of each individual NMOS current source to either the positive output node
IOUT1 or its complementary negative output node IOUT2. The output impedance is determined by the stack of
the current sources and differential switches, and is typically >300 k
in parallel with an output capacitance of
5 pF.
The external output resistors are referred to AVDD. The minimum output compliance at nodes IOUT1 and IOUT2
is limited to AVDD – 0.5 V. The maximum output compliance voltage at nodes IOUT1 and IOUT2 equals AVDD +
0.5 V. Beyond this value, transistor breakdown may occur, resulting in reduced reliability of the DAC5687 device.
Exceeding the minimum output compliance voltage adversely affects distortion performance and integral
nonlinearity. The optimum distortion performance for a single-ended or differential output is achieved when the
maximum full-scale signal at IOUT1 and IOUT2 is in the range of AVDD ±0.5 V.
52
Copyright 2005–2006, Texas Instruments Incorporated
Product Folder Link(s): DAC5687
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| DAC5687IPZPG4 | 功能描述:数模转换器- DAC 16-bit 500 MSPS 2-8x Interpolat’g Dual-Ch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5687IPZPR | 功能描述:数模转换器- DAC 16-bit 500 MSPS 2-8x Interpolat’g Dual-Ch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5687IPZPRG4 | 功能描述:数模转换器- DAC 16-bit 500 MSPS 2-8x Interpolat’g Dual-Ch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC5687MPZPEP | 功能描述:数模转换器- DAC 16B 500Msps 2X-8X Interp 2-Channel DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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