参数资料
型号: DAC5687IPZP
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100
封装: GREEN, PLASTIC, HTQFP-100
文件页数: 51/79页
文件大小: 2490K
代理商: DAC5687IPZP
www.ti.com
Digital Inputs
DA[15:0]
DB[15:0]
SLEEP
PHSTR
TXENABLE
QFLAG
SDIO
SCLK
SDENB
Internal
Digital In
IOVDD
IOGND
RESETB
Internal
Digital In
IOVDD
IOGND
S0027-01
Clock Inputs
CLK
Internal
Digital In
CLKC
CLKGND
R1
10 k
CLKVDD
R1
10 k
R2
10 k
R2
10 k
CLKVDD
S0028-01
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
QOUT(t) = (IIN(t)sin(2π × 0 × t + π/4) + 0 × cos(2π × 0 × t + π/4)) × 2
(1 – 1) = I
IN(t)sin(π/4) = IIN(t)/2
Applying the QMC gain of 1446, equivalent to 2, increases the signal back to unity gain through the FMIX and
the QMC blocks.
Note that with this termination, the DAC side of the transformer is not 50-
terminated and therefore may result
in reflections when used with a cable output.
Figure 63 shows a schematic of the equivalent CMOS digital inputs of the DAC5687. DA[15:0], DB[15:0], SLEEP,
PHSTR, TXENABLE, QFLAG, SDIO, SCLK, and SDENB have pulldown resistors and RESETB has a pullup
resistor internal to the DAC5687. See the specification table for logic thresholds. The pullup and pulldown
circuitry is approximately equivalent to 100 k
.
Figure 63. CMOS/TTL Digital Equivalent Input
Figure 64 shows an equivalent circuit for the clock input.
Figure 64. Clock Input Equivalent Circuit
Figure 65, Figure 66, and Figure 67 show various input configurations for driving the differential clock input
(CLK/CLKC).
Copyright 2005–2006, Texas Instruments Incorporated
55
Product Folder Link(s): DAC5687
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