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参数资料
| 型号： | DDC118IRTCT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 8-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC48 |
| 封装： | GREEN, PLASTIC, QFN-48 |
| 文件页数： | 10/35页 |
| 文件大小： | 653K |
| 代理商： | DDC118IRTCT |
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DDC118
SBAS325B JUNE 2004 REVISED APRIL 2009
www.ti.com
18
t
12
T
INT
T
INT
t
16
t
12
t
13
t
15
t
17
Release
State
End Integration Side A
Start Integration Side B
End Integration Side B
Wait State
Side A
Data Ready
Side B
Data Ready
Start Integration Side A
CONV
A/D Conversion
Inputs 1, 2, 5, and 6
A/D Conversion
Inputs 3, 4, 7, and 8
DVALID
Figure 14. Conversion Detail for the Internal Operation of Non-Continuous Mode with Side A Integrated
First
Table 8. Internal Timing for the DDC118 in Non-Continuous Mode
SYMBOL
DESCRIPTION
CLK = 4MHz, CLK_4X = 0
CLK = 4.8MHz, CLK_4X = 0
UNITS
SYMBOL
DESCRIPTION
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
T
INT
Integration Time (non-continuous mode)
400
1,000,000
320
1,000,000
s
t
12
A/D Conversion Time (internally controlled)
169.5
141.25
s
t
13
A/D Conversion Reset Time (internally controlled)
4
3.333
s
t
15
Integrator and A/D Conversion Reset Time
(internally controlled)
19.5
16.25
s
t
16
Total A/D Conversion and Reset Time (internally controlled)
725.25
± 0.25
604.375
± 0.208
s
t
17
Release Time
18
15
s
t
12
T
INT
T
INT
t
16
t
12
t
13
t
15
t
17
Release
State
End Integration Side A
Start Integration Side B
End Integration Side B
Wait State
Side A
Data Ready
Side B
Data Ready
Start Integration Side A
CONV
A/D Conversion
Inputs 1, 2, 5, and 6
A/D Conversion
Inputs 3, 4, 7, and 8
DVALID
Figure 15. Internal Operation Timing Diagram of Non-Continuous Mode with Side B Integrated First
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