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参数资料
| 型号： | DDC118IRTCT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 8-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC48 |
| 封装： | GREEN, PLASTIC, QFN-48 |
| 文件页数： | 17/35页 |
| 文件大小： | 653K |
| 代理商： | DDC118IRTCT |
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DDC118
SBAS325B JUNE 2004 REVISED APRIL 2009
www.ti.com
24
RETRIEVAL AFTER CONV TOGGLES
(CONTINUOUS MODE)
For shorter integration times, more time is available if data
retrieval begins after CONV toggles and ends before the
new data is ready. Data retrieval must wait t29 after CONV
toggles before beginning. See Figure 24 for an example of
this. The maximum time available for retrieval is
t27 t29 – t26 (344.875s – 10s – 1.75s for
CLK = 4MHz), regardless of TINT. The maximum number
of DDC118s that can be daisy-chained together (FORMAT
= high) is calculated by Equation 3:
333.125
ms
160
t
DCLK
NOTE: 128
τDCLK is used for FORMAT = low.
For DCLK = 10MHz, the maximum number of DDC118s is
20 (or 26 for FORMAT = low).
SYMBOL
DESCRIPTION
CLK = 4MHz, CLK_4X = 0
CLK = 4.8MHz, CLK_4X = 0
UNITS
SYMBOL
DESCRIPTION
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
t26
Hold Time that DOUT is Valid Before Falling Edge of DVALID
1.75
1.458
s
t27
Cont Mode Data Ready
345.00
± 0.125
287.5
± 0.104
s
t29
Data Retrieval Start-Up After Edge of CONV
10
s
Figure 24. Readback After CONV Toggles
(3)
T
INT
t
27
t
29
t
26
T
INT
T
INT
……
…
……
…
Side A
Data
Side B
Data
Side A
Data
CONV
DVALID
DCLK
DOUT
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| DDC118IRTCT | 制造商:Texas Instruments 功能描述:IC ADC 20BIT OCTAL 48-VQFN |
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