参数资料
型号: DS21FF44N
厂商: DALLAS SEMICONDUCTOR
元件分类: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA300
封装: 27 X 27 MM, BGA-300
文件页数: 81/110页
文件大小: 526K
代理商: DS21FF44N
DS21FT44/DS21FF44
72 of 110
SYMBOL
POSITION
NAME AND DESCRIPTION
RSaDS
RDC1.6
Receive Sa Bit / DS0 Select.
0 = route Sa bits to the HDLC controller. RD0 to RD4 defines
which Sa bits are to be routed. RD4 corresponds to Sa4, RD3
to Sa5, RD2 to Sa6, RD1 to Sa7 and RD0 to Sa8.
1 = route DS0 channels into the HDLC controller. RDC1.5 is
used to determine how the DS0 channels are selected.
RDS0M
RDC1.5
DS0 Selection Mode.
0 = utilize the RD0 to RD4 bits to select which single DS0
channel to use.
1 = utilize the RCHBLK control registers to select which DS0
channels to use.
RD4
RDC1.4
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
RD3
RDC1.3
DS0 Channel Select Bit 3.
RD2
RDC1.2
DS0 Channel Select Bit 2.
RD1
RDC1.1
DS0 Channel Select Bit 1.
RD0
RDC1.0
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
RDC2: RECEIVE HDLC DS0 CONTROL REGISTER 2 (Address=B9 Hex)
(MSB)
(LSB)
RDB8
RDB7
RDB6
RDB5
RDB4
RDB3
RDB2
RDB1
SYMBOL
POSITION
NAME AND DESCRIPTION
RDB8
RDC2.7
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to
stop this bit from being used.
RDB7
RDC2.6
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from
being used.
RDB6
RDC2.5
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from
being used.
RDB5
RDC2.4
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from
being used.
RDB4
RDC2.3
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from
being used.
RDB3
RDC2.2
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from
being used.
RDB2
RDC2.1
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from
being used.
RDB1
RDC2.0
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to
stop this bit from being used.
相关PDF资料
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