参数资料
型号: DS21Q58LN
英文描述: E1 Quad Transceiver
中文描述: 素E1通道收发器
文件页数: 43/74页
文件大小: 647K
代理商: DS21Q58LN
DS21Q58 E1 Quad Transceiver
43 of 74
19.
On the receiver, the RAF and RNAF registers always report the data as it is received in the additional (Sa) and
international (Si) bit locations. The RAF and RNAF registers are updated with the setting of the receive align frame
bit in status register 2 (SR2.6). The host can use the SR2.6 bit to know when to read the RAF and RNAF registers.
It has 250 s to retrieve the data before it is lost.
On the transmitter, data is sampled from the TAF and TNAF registers with the setting of the transmit align frame bit
in status register 2 (SR2.3). The host can use the SR2.3 bit to know when to update the TAF and TNAF registers. It
has 250 s to update the data or else the old data is retransmitted. Data in the Si bit position is overwritten if either
the framer is programmed (1) to source the Si bits from the TSER pin, (2) in the CRC4 mode, or if the framer (3)
has automatic E-bit insertion enabled. Data in the Sa bit position is overwritten if any of the TCR.3–TCR.7 bits are
set to 1. Please see the TCR register descriptions for more details.
Register Name:
RAF
Register Description:
Receive Align Frame Register
Register Address:
28 Hex
Bit #
7
6
5
4
3
Name
Si
0
0
1
1
NAME
BIT
FUNCTION
Si
7
International Bit
0
6
Frame Alignment Signal Bit
0
5
Frame Alignment Signal Bit
1
4
Frame Alignment Signal Bit
1
3
Frame Alignment Signal Bit
0
2
Frame Alignment Signal Bit
1
1
Frame Alignment Signal Bit
1
0
Frame Alignment Signal Bit
Register Name:
RNAF
Register Description:
Receive Nonalign Frame Register
Register Address:
29 Hex
Bit #
7
6
5
4
3
Name
Si
1
A
Sa4
Sa5
NAME
BIT
FUNCTION
Si
7
International Bit
1
6
Frame Nonalignment Signal Bit
A
5
Remote Alarm
Sa4
4
Additional Bit 4
Sa5
3
Additional Bit 5
Sa6
2
Additional Bit 6
Sa7
1
Additional Bit 7
Sa8
0
Additional Bit 8
ADDITIONAL (Sa) AND INTERNATIONAL (Si) BIT OPERATION
2
0
1
1
0
1
2
1
0
Sa6
Sa7
Sa8
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