参数资料
型号: DS21Q58LN
英文描述: E1 Quad Transceiver
中文描述: 素E1通道收发器
文件页数: 53/74页
文件大小: 647K
代理商: DS21Q58LN
DS21Q58 E1 Quad Transceiver
53 of 74
22.
The DS21Q58 provides a CMI interface for connecting to optical transports. This interface is a unipolar 1T2B-
coded signal. Ones are alternately encoded as a logical 1 or 0 level for the full duration of the clock period. Zeros
are encoded as a 0-to-1 transition at the middle of the clock period.
Figure 22-1
shows an example data pattern
and its CMI result. The control bit for enabling CMI is in the OUTAC register, as shown below.
Register Name:
OUTAC
Register Description:
OUTA Control Register
Register Address:
1A Hex
Bit #
7
6
5
4
Name
TTLIE
CMII
CMIE
OA4
OA3
NAME
BIT
FUNCTION
TTL Input Enable.
When this bit is set, the receiver can accept TTL
positive and negative data at the RTIP and RRING inputs. The data is
clocked in on the falling edge of MCLK.
CMI Invert
0 = CMI input data not inverted
1 = CMI input data inverted
Transmit and Receive CMI Enable
0 = Transmit and receive line interface operates in normal AMI/HDB3 mode/
1 = Transmit and receive line interface operate in CMI mode. TTIP is CMI
output and RTIP is CMI input. In this mode of operation TRING and RRING
are not connected.
OA4
4
OUTA Control Bit 4.
Inverts OUTA output.
OA3
3
OUTA Control Bit 3.
See
Table 20-1
for details.
OA2
2
OUTA Control Bit 2.
See
Table 20-1
for details.
OA1
1
OUTA Control Bit 1.
See
Table 20-1
for details.
OA0
0
OUTA Control Bit 0.
See
Table 20-1
for details.
CODE MARK INVERSION (CMI)
3
2
1
0
OA2
OA1
OA0
TTLIE
7
CMII
6
CMIE
5
Figure 22-1. CMI Coding
0
1
1
1
0
0
1
CLOCK
DATA
CMI
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