参数资料
型号: DS21Q58LN
英文描述: E1 Quad Transceiver
中文描述: 素E1通道收发器
文件页数: 55/74页
文件大小: 647K
代理商: DS21Q58LN
DS21Q58 E1 Quad Transceiver
55 of 74
23.
In many architectures, the PCM outputs of individual framers are combined into higher-speed PCM buses to
simplify transport across the system backplane. The DS21Q58 can be configured to allow PCM data buses to be
multiplexed into higher-speed data buses, eliminating external hardware and saving board space and cost. The
DS21Q58 uses a channel interleave method. See
Figure 24-4
and
Figure 24-7
for details of the channel interleave.
The interleaved PCM bus option supports three bus speeds. The 4.096MHz bus speed allows two PCM data
streams to share a common bus. The 8.192MHz bus speed allows four PCM data streams to share a common bus.
The 16.384MHz bus speed allows eight PCM data streams to share a common bus. See
Figure 23-1
for an
example of four transceivers sharing a common 8.192MHz PCM bus. The receive elastic stores of each transceiver
must be enabled. Through the IBO register the user can configure each transceiver for a specific bus speed and
position. For all IBO bus configurations each transceiver is assigned an exclusive position in the high-speed PCM
bus. When the device is configured for IBO operation, the TSYNCx pin should be configured as an output or as an
input connected to ground. The user cannot supply a TSYNCx signal in this mode.
Register Name:
IBO
Register Description:
Interleave Bus Operation Register
Register Address:
1C Hex
Bit #
7
6
5
4
Name
IBOTCS
SCS1
SCS0
NAME
BIT
7
Not Assigned.
Should be set to 0.
IBO Transmit Clock Source
0 = TCLK pin is the source of transmit clock
1 = Transmit clock is internally derived from the clock at the SYSCLK pin
SCS1
5
System Clock Select Bit 1
(
Table 23-1
)
SCS0
4
System Clock Select Bit 0
(
Table 23-1
)
Interleave Bus Operation Enable
0 = IBO disabled
1 = IBO enabled
DA2
2
Device Assignment Bit 3
(
Table 23-2
)
DA1
1
Device Assignment Bit 2
(
Table 23-2
)
DA0
0
Device Assignment Bit 1
(
Table 23-2
)
INTERLEAVED PCM BUS OPERATION
3
2
1
0
IBOEN
DA2
DA1
DA0
FUNCTION
IBOTCS
6
IBOEN
3
Table 23-1. IBO System Clock Select
SCS1
0
0
1
1
SCS0
0
1
0
1
FUNCTION
2.048MHz, single device on bus
4.096MHz, two devices on bus
8.192MHz, four devices on bus
16.384MHz, eight devices on bus
Table 23-2. IBO Device Assignment
DA2
DA1
DA0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
FUNCTION
1st device on bus
2nd device on bus
3rd device on bus
4th device on bus
5th device on bus
6th device on bus
7th device on bus
8th device on bus
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