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参数资料
型号： DS3254DK
厂商： Maxim Integrated Products
文件页数： 7/71页
文件大小： 0K
描述： KIT DEMO FOR DS3254
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
设计资源： DS3254DK Gerber Files
标准包装： 1
主要目的： 电信，线路接口单元（LIU）
已用 IC / 零件： DS3254
已供物品： 板，CD
DS3251/DS3252/DS3253/DS3254
15 of 71
7. REGISTER DESCRIPTIONS
When the DS325x is configured in either of the two CPU bus modes (HW = 0), the registers shown in Table 7-A
are accessible through the CPU bus interfaces. All registers for the LIU ports are forced to their default values
during an internal power-on reset or when the
RST pin is driven low. Setting an LIU’s RST bit high forces all
registers for that LIU to their default values. All register bits marked “—” must be written 0 and ignored when read.
The TEST registers must be left at their reset value of 00h for normal operation.
On the DS3253, only registers for LIUs 1, 2, and 3 are available. Writes into LIU 4 address space are ignored.
Reads from LIU 4 address space return all zeros. On the DS3252, address line A5 is not present, limiting the
address space to the LIU 1 and LIU 2 registers. On the DS3251, address lines A5 and A4 are not present, limiting
the address space to the LIU 1 registers.
Table 7-A. Register Map
ADDRESS
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LIU 1
00h
GCR1
E3M
STS
LLB
RLB
TDSA
TDSB
—
RST
01h
TCR1
JAL[1]
TBIN
TCINV
TJA
TPD
TTS
TLBO
JAL[0]
02h
RCR1
ITU
RBIN
RCINV
RJA
RPD
RTS
RMON
RCVUD
03h
SR1
—
TDM
PRBS
—
RLOL
RLOS
04h
SRL1
JAFL
JAEL
TDML
PRBSL
PBERL
RCVL
RLOLL
RLOSL
05h
SRIE1
JAFIE
JAEIE
TDMIE
PRBSIE
PBERIE
RCVIE
RLOLIE
RLOSIE
06h
RCVL1
RCV[7]
RCV[6]
RCV[5]
RCV[4]
RCV[3]
RCV[2]
RCV[1]
RCV[0]
07h
RCVH1
RCV[15]
RCV[14]
RCV[13]
RCV[12]
RCV[11]
RCV[10]
RCV[9]
RCV[8]
08h
CACR
T3MOE
E3MOE
STMOE
—
AMCSEL[1] AMCSEL[0]
AMCEN
09h–0Fh
Test Registers
—
LIU 2
10h
GCR2
E3M
STS
LLB
RLB
TDSA
TDSB
—
RST
11h
TCR2
JAL[1]
TBIN
TCINV
TJA
TPD
TTS
TLBO
JAL[0]
12h
RCR2
ITU
RBIN
RCINV
RJA
RPD
RTS
RMON
RCVUD
13h
SR2
—
TDM
PRBS
—
RLOL
RLOS
14h
SRL2
JAFL
JAEL
TDML
PRBSL
PBERL
RCVL
RLOLL
RLOSL
15h
SRIE2
JAFIE
JAEIE
TDMIE
PRBSIE
PBERIE
RCVIE
RLOLIE
RLOSIE
16h
RCVL2
RCV[7]
RCV[6]
RCV[5]
RCV[4]
RCV[3]
RCV[2]
RCV[1]
RCV[0]
17h
RCVH2
RCV[15]
RCV[14]
RCV[13]
RCV[12]
RCV[11]
RCV[10]
RCV[9]
RCV[8]
18h
unused
—
19h–1Fh
Test Registers
—
LIU 3
20h
GCR3
E3M
STS
LLB
RLB
TDSA
TDSB
—
RST
21h
TCR3
JAL[1]
TBIN
TCINV
TJA
TPD
TTS
TLBO
JAL[0]
22h
RCR3
ITU
RBIN
RCINV
RJA
RPD
RTS
RMON
RCVUD
23h
SR3
—
TDM
PRBS
—
RLOL
RLOS
24h
SRL3
JAFL
JAEL
TDML
PRBSL
PBERL
RCVL
RLOLL
RLOSL
25h
SRIE3
JAFIE
JAEIE
TDMIE
PRBSIE
PBERIE
RCVIE
RLOLIE
RLOSIE
26h
RCVL3
RCV[7]
RCV[6]
RCV[5]
RCV[4]
RCV[3]
RCV[2]
RCV[1]
RCV[0]
27h
RCVH3
RCV[15]
RCV[14]
RCV[13]
RCV[12]
RCV[11]
RCV[10]
RCV[9]
RCV[8]
28h
unused
—
29h–2Fh
Test Registers
—
LIU 4
30h
GCR4
E3M
STS
LLB
RLB
TDSA
TDSB
—
RST
31h
TCR4
JAL[1]
TBIN
TCINV
TJA
TPD
TTS
TLBO
JAL[0]
32h
RCR4
ITU
RBIN
RCINV
RJA
RPD
RTS
RMON
RCVUD
33h
SR4
—
TDM
PRBS
—
RLOL
RLOS
34h
SRL4
JAFL
JAEL
TDML
PRBSL
PBERL
RCVL
RLOLL
RLOSL
35h
SRIE4
JAFIE
JAEIE
TDMIE
PRBSIE
PBERIE
RCVIE
RLOLIE
RLOSIE
36h
RCVL4
RCV[7]
RCV[6]
RCV[5]
RCV[4]
RCV[3]
RCV[2]
RCV[1]
RCV[0]
37h
RCVH4
RCV[15]
RCV[14]
RCV[13]
RCV[12]
RCV[11]
RCV[10]
RCV[9]
RCV[8]
38h
unused
—
39h–3Fh
Test Registers
—
Note 1: Underlined bits are read-only; all other bits are read-write.
Note 2: The registers are named REGn, where n = the LIU number (1, 2, 3, or 4). The register names are hyperlinks to the register descriptions.
Note 3: The bit names are the same for each LIU register set.
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DS3254N+ 功能描述:网络控制器与处理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS3254NA3 制造商:Maxim Integrated Products 功能描述:QUAD ENH DS3/E3 LIU REV A3 IND - Rail/Tube
DS3256 功能描述:网络控制器与处理器 IC X6 T3/E3 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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