
7–4
Altera Corporation
Stratix Device Handbook, Volume 2
September 2004
TriMatrix Memory Overview
Each DSP block supports either eight 9
× 9-bit multipliers, four 18-bit
multipliers, or one 36
× 36-bit multiplier. These multipliers can feed an
adder or an accumulator unit based on the operation mode.
Table 7–3shows the different operation modes for the DSP blocks.
Implementing multipliers, multiply-adders, and multiply-accumulators
in the DSP blocks has a performance advantage over logic cell
implementation. Using DSP blocks also reduces logic cell and routing
resource consumption. To achieve higher performance, register each
stage of the DSP block to allow pipelining. For implementing
applications, such as FIR filters, efficiently use the input registers of the
DSP block as shift registers.
f
For more information on DSP blocks, see the DSP Blocks in Stratix &
Stratix GX Devices chapter.
TriMatrix
Memory
Overview
Stratix and Stratix GX devices feature the TriMatrix memory structure,
composed of three sizes of embedded RAM blocks. These include the
512-bit size M512 block, the 4-Kbit size M4K block, and the 512-Kbit size
M-RAM block. Each block is configurable to support a wide range of
features.
Tables 7–4 and
7–5 show the number of memory blocks in each Stratix
and Stratix GX device, respectively.
Table 7–3. Operation Modes for DSP Blocks
DSP Block Mode
Number & Size of Multipliers per DSP Block
9 x 9-bit
18 x 18-bit
36 x 36-bit
Simple multiplier
Eight multipliers with
eight product outputs
Four multipliers with four
product outputs
One multiplier with one
product output
Multiply-accumulate
Two multiply and
accumulate (34 bit)
Two multiply and
accumulate (52 bit)
Two-multipliers adder
4 two-multipliers adders
2 two-multipliers adders
Four-multipliers adder
2 four-multipliers adder
1 four-multipliers adder
Table 7–4. TriMatrix Memory Resources in Stratix Devices (Part 1 of 2)
Device
M512
M4K
M-RAM
EP1S10
94
60
1
EP1S20
194
82
2
EP1S25
224
138
2