参数资料
型号: EVAL-AD5560EBUZ
厂商: Analog Devices Inc
文件页数: 36/68页
文件大小: 0K
描述: BOARD EVALUATION FOR AD5560
标准包装: 1
主要目的: 电源管理,电源监控器/跟踪器/序列发生器
已用 IC / 零件: AD5560
次要属性: 串行接口
已供物品:
Data Sheet
AD5560
Rev. D | Page 41 of 68
REFERENCE SELECTION
The voltage applied to the VREF pin determines the output
voltage range and span applied to the force amplifier, clamp,
and comparator inputs and the current ranges.
This device can be used with a reference input ranging from
2 V to 5 V. However, for most applications, a reference input
of 5 V is able to meet all voltage range requirements. The DAC
amplifier gain is 5.125, which gives a DAC output span of
25.625 V. The DACs have gain and offset registers that can
be used to calibrate out system errors. In addition, the gain
register can be used to reduce the DAC output range to the
desired force voltage range.
Using a 5 V reference and setting the m (gain) register to one-
fourth scale or 0x4000 gives an output voltage span of 6.25 V.
Because the force DAC has 18 bits of resolution even with only
one-fourth of the output voltage span, it is still possible to
achieve 16-bit resolution in this 6.25 V range.
The measure current amplifier has two gain settings, 10 and 20.
The two gain settings allow users to achieve the quoted/speci-
fied current ranges with large or small voltage swings. The 20
gain setting is intended for use with a 5 V reference, and the 10
gain setting is for use with a 2.5 V reference. Both combinations
ensure the specified current ranges. Other VREF/gain setting
combinations should be used only to achieve smaller current
ranges. See Table 27 for suggested references for use with the
AD5560.
CHOOSING AVDD/AVSS POWER SUPPLY RAILS
As noted in the Specifications section, the minimum supply
variation across the part is |AVDD AVSS| ≥ 16 V and ≤ 33 V,
AVDD ≥ 8 V, and AVSS ≤ 5 V. For the AD5560 circuits to
operate correctly, the supply rails must take into account not
only the force voltage range but also the internal DAC
minimum voltage level, as well as headroom/footroom.
The DAC amplifier gains VREF by 5.125, and the offset DAC
centers that range about some chosen point. Because the DAC
minimum voltage (VMIN) is used in other parts of the circuit
(MEASOUT gain of 0.2), it is important that AVSS be chosen
based on the following:
AVSS ≤ 5.125 × (VREF × (OFFSET_DAC_CODE/216))
AVSS_Headroom VDUTGND (RCABLE × ILOAD)
where:
AVSS_Headroom is the 2.75 V headroom (includes the RSENSE
voltage drop).
VDUTGND is the voltage range anticipated at DUTGND.
RCABLE is the cable/path resistance.
ILOAD is the maximum load current.
When choosing AVDD, remember to take into account the
specified current ranges. The measure current block has either
a gain of 20 or 10 and must have sufficient headroom/
footroom to operate correctly.
As the nominal, VRSENSE is ±0.5 V for the full-scale specified
current flowing for all ranges. If this is gained by 20, the
measure current amplifier output (internal node) voltage
range is ±10 V with full-scale current and the default offset
DAC setting. The measure current block needs ±2.25 V
footroom/headroom for correct operation in addition to
the ±0.5 V VRSENSE.
For simplicity, when VREF = 5 V, minimum |AVDD AVSS| =
31.125 V (VREF × 5.125 + headroom + footroom); otherwise,
there can be unanticipated effects resulting from headroom/
footroom issues. This does not take into account cable loss or
DUTGND contributions.
Similarly, when VREF = 2.5 V, minimum |AVDD AVSS| = 18.3 V
and, when VREF = 2 V, minimum |AVDD AVSS| = 16 V.
The AD5560 is designed to settle fast into large capacitive loads;
therefore, when slewing, the device draws 2× to 3× the current
range from the AVDD/AVSS supplies. When supply rails are
chosen, they should be capable of supplying each DPS channel
with sufficient current to slew.
CHOOSING HCAVSSx AND HCAVDDx SUPPLY RAILS
Selection of HCAVSSx and HCAVDDx supplies is determined by
the EXTFORCE1 and EXTFORCE2 output ranges. The supply
rails chosen must take into account headroom and footroom,
DUTGND voltage range, cable loss, supply tolerance, and
VRSENSE. If diodes are used in series with the HCAVSSx and
HCAVDDx supplies pins (shown in Figure 59), the diode voltage
drop should also be factored into the supply rail calculation.
The AD5560 is designed to settle fast into large capacitive loads
in high current ranges; therefore, when slewing, the device draws
2× to 3× the current range from the HCAVSSx and HCAVDDx
supplies. When choosing supply rails, ensure that they are
capable of supplying each DPS channel with sufficient current
to slew.
All output stages of the AD5560 are symmetrical; they can
source and sink the rated current. Supply design/bypassing
should account for this.
POWER DISSIPATION
The maximum power dissipation allowed in the EXTFORCE1
stage is 10 W, whereas in the EXTFORCE2 stage, it is 5 W.
Take care to ensure that the device is adequately cooled to
remove the heat. The quiescent current is ~0.8 W with an
internal current range enabled and ~1 W with external current
ranges, EXTFORCE1 or EXTFORCE2, enabled. This device is
specified for performance up to 90°C junction temperature (TJ).
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