- 您现在的位置：买卖IC网 > PDF目录16871 > EVAL-AD5560EBUZ (Analog Devices Inc)BOARD EVALUATION FOR AD5560 PDF资料下载
参数资料
| 型号： | EVAL-AD5560EBUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 59/68页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD5560 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电源监控器/跟踪器/序列发生器 |
| 已用 IC / 零件： | AD5560 |
| 次要属性： | 串行接口 |
| 已供物品： | 板 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页当前第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页
AD5560
Data Sheet
Rev. D | Page 62 of 68
APPLICATIONS INFORMATION
THERMAL CONSIDERATIONS
Table 28. Thermal Resistance for TQFP_EP1
Cooling
Airflow (LFPM)
θ
JA
θ
JC (Uniform)
θ
JC (Local)
Ideal TIM6
θJC(Local)
w/TIM6
θJCP
w/TIM5
Unit
No Heat Sink
0
39
N/A
°C/W
200
37.2
°C/W
500
35.7
°C/W
Heat Sink7
0
12.2
N/A
°C/W
200
11.1
1.0
2.8
4.91
°C/W
500
9.5
°C/W
Cold Plate8
N/A
1.0
2.8
4.91
7.5
°C/W
1 All numbers are simulated and assume a JEDEC 4-layer test board.
2 θ
JA is the thermal resistance from hottest junction to ambient air.
3 θ
JC
(Uniform) is the thermal resistance from junction to the package top, assuming total power is uniformly distributed.
4 θ
JC
(Local) is the thermal resistance from junction to the center of package top, assuming total power = 8.5 W (1 W uniformly distributed, 7.5 W in power stages—local
heating).
5 θ
JCP is the thermal resistance from hottest junction to infinite cold plate with consideration of thermal interface material (TIM).
6 Ideal TIM is assuming top of package in perfect contact with an infinite cold plate. w/TIM is assuming TIM is 0.5 mm thick, with thermal conductivity of 2.56 W/m/k.
7 Heat sink with a rated performance of θ
CA ~5.3°C/W under forced convection, gives ~TJ = 111°C at 500 LFM. Thermal performance of the package depends on the heat
sink and environmental conditions.
8 Attached infinite cold plate should be ≤26°C to maintain T
J < 90°C, given total power = 8.5 W. Thermal performance of the package depends on the heat sink and
environmental conditions.
9 To estimate junction temperature, the following equations can be used:
TJ = Tamb + θJA × Power
TJ = Tcoldplate + θJCP × Power
TJ = Ttop + θJC × Power
Table 29. Thermal Resistance for Flip Chip BGA1
Cooling
Airflow (LFPM)
θJA2
θJC(Uniform)3
θ
JC (Local)
Ideal TIM6
θJC(Local)
w/TIM6
θ
JCP
w/TIM
Unit
No Heat Sink
0
40.8
N/A
°C/W
200
38.1
°C/W
500
36
°C/W
Heat Sink8
0
18
N/A
°C/W
200
11.8
0.05
1.6
4.6
°C/W
500
9
°C/W
Cold Plate9
N/A
0.05
1.6
4.6
6.5
°C/W
1 All numbers are simulated and assume a JEDEC 4-layer test board.
2 θ
JA is the thermal resistance from hottest junction to ambient air.
3 θ
JC (Uniform) is the thermal resistance from junction to the package top, assuming total power is uniformly distributed.
4 θ
JC (Local) is the thermal resistance from junction to the center of package top, assuming total power = 8.5 W (1 W uniformly distributed, 7.5 W in power stages—local
heating).
5 θ
JCP is the thermal resistance from hottest junction to infinite cold plate with consideration of thermal interface material (TIM).
6 Ideal TIM is assuming top of package in perfect contact with an infinite cold plate. w/TIM is assuming TIM is 0.4 mm thick, with thermal conductivity of 3.57 W/m/k.
7 Heat sink with a rated performance of θ
CA ~4.9°C/W under forced convection, gives ~TJ = 112°C at 500 LFM. Thermal performance of the package depends on the heat
sink and environmental conditions.
8 Attached infinite cold plate should be ≤30°C to maintain T
J < 90°C, given total power = 8.5 W. Thermal performance of the package depends on the heat sink and
environmental conditions.
9 To estimate junction temperature, the following equations can be used:
T
J
= Tamb + θJA × Power
T
J
= Tcoldplate + θJCP × Power
T
J
= Ttop + θJC × Power
相关PDF资料 |
PDF描述 |
|---|---|
| EVAL-AD5522EBDZ | BOARD EVAL FOR 14X14MM AD5522 |
| EVAL-AD5520EBZ | BOARD EVAL FOR AD5520 |
| MAX6198AESA+T | IC VREF SERIES PREC 4.096V 8SOIC |
| QPI-5-EVAL1 | EVALUATION BOARD FOR QPI-5 |
| H6MMH-4006M | DIP CABLE - HDM40H/AE40M/HDM40H |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-AD5570EB | 制造商:Analog Devices 功能描述:DEV TOOLS, TRUE ACCURACY, 16BIT 12V/ 15V, SERL INPUT VOLT O - Bulk |
| EVAL-AD5570EBZ | 功能描述:BOARD EVALUATION FOR AD5570 RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5570SDZ | 功能描述:BOARD EVAL FOR AD5570 RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5590EBZ | 功能描述:BOARD EVAL FOR AD5590 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
| EVAL-AD5620EB | 制造商:AD 制造商全称:Analog Devices 功能描述:Single, 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference in SOT-23 |
发布紧急采购，3分钟左右您将得到回复。