参数资料
型号: EVAL-AD7195EBZ
厂商: Analog Devices Inc
文件页数: 39/45页
文件大小: 0K
描述: BOARD EVAL FOR AD7195
设计资源: EVAL-AD7195EBZ Schematic
AD7195 Gerber Files
标准包装: 1
主要目的: 接口,模拟前端(AFE)
已用 IC / 零件: AD7195
次要属性: 图形用户界面,USB 接口
已供物品:
AD7195
Rev. 0 | Page 43 of 44
APPLICATIONS INFORMATION
The AD7195 provides a low-cost, high resolution analog-to-
digital function. Because the analog-to-digital function is
provided by a Σ-Δ architecture, the part is more immune
to noisy environments, making it ideal for use in sensor
measurement and industrial and process control applications.
WEIGH SCALES
Figure 50 shows the AD7195 being used in a weigh scale applica-
tion which uses ac excitation. The load cell is arranged in a bridge
network and gives a differential output voltage between its OUT+
and OUT– terminals. Assuming a 5 V excitation voltage, the full
-scale output range from the transducer is 10 mV when the
sensitivity is 2 mV/V. The excitation voltage for the bridge can
be used to directly provide the reference for the ADC because
the reference input range includes the supply voltage.
With ac-excitation, the excitation voltage to the load cell is
changed on each phase. In Phase 1, the T2 and T4 transistors
are turned on using ACX1 and ACX1 while the T1 and T3
transistors are turned off. The bridge is forward biased. During
Phase 2, Transistor T1 and Transistor T3 are turned on using
ACX2 and ACX2. In this phase, the excitation voltage to the
bridge is reversed while the analog input signal and the
reference voltage are also reversed. The AD7195 averages the
conversions from the two phases so that any offsets and thermal
affects are cancelled.
AC excitation is enabled by setting Bit ACX in the configuration
register to 1. When the ACX bit is set to 0, the bridge is dc
excited. When the AD7195 is in power-down mode, the bridge
is disconnected from the excitation voltage, which minimizes
power consumption of the system. Following a reset, the ac
excitation pins are undefined for a few milliseconds. Thus, pull-
up/pull-down resistors should be used on the pins to prevent
the excitation voltage being shorted to AGND.
For simplicity, external filters are not included in Figure 50.
However, an R-C antialias filter must be included on each
analog input. This is required because the on-chip digital filter
does not provide any rejection around the modulator sampling
frequency or multiples of this frequency.
MCLK1 MCLK2
DVDD DGND
AIN1
AIN2
AIN3
AIN4
AINCOM
BPDSW
AD7195
REFERENCE
DETECT
SERIAL
INTERFACE
AND
CONTROL
LOGIC
TEMP
SENSOR
AC
EXCITATION
CLOCK
CIRCUITRY
DOUT/RDY
DIN
SCLK
CS
SYNC
AVDD
AGND
REFIN(+)
REFIN(–)
Σ-Δ
ADC
PGA
MUX
ACX1
ACX2
AVDD
+5V
T1
T2
T3
T4
IN+
IN–
OUT–
OUT+
1M
1M
0
87
71
-03
2
Figure 50. Typical Application (Weigh Scale)
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