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参数资料
| 型号： | FX980L6 |
| 厂商： | CML MICROSYSTEMS PLC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 33/86页 |
| 文件大小： | 821K |
| 代理商： | FX980L6 |
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TETRA Baseband Processor
FX980
1997 Consumer Microcircuits Limited
39
D/980/3
LoopBackCtrl
Title:
LoopBack Control register
Address:
$0x0D
Function:
RW
Description:
This register is only used for test purposes. For normal operation all these bits should be
inactive.
Bit
Name
Active State
Function
7:6
RW
Reserved. These bits should be set Low. Undefined on
read.
5
FirReset
High
RW
When active, this bit holds all FIR filters in reset, by
resetting the FIR address pointers. This by itself does not
reset the data register RAMs. A separate access is
provided to disable the complete Tx or Rx Data path.
Taking N_RESET Low will also reset the FIR filter
coefficients to their default values.
4
DigLoopBack
High
RW
When set active this bit enables the digital loopback
feature. This connects the output of the Rx Data path
49-tap filter to the input of the Tx Data path 49-tap digital
filter, thereby allowing an analogue signal presented at the
Rx inputs to be filtered by a raised cosine filter and
monitored at the Tx outputs as an analogue signal.
3
AnaLoopBack
High
RW
When set active this bit enables the analogue loopback
feature. This connects the output of the Tx Data path DAC
to the input of Rx Data path ADC, thus passing transmit
constellation data through a raised cosine filter and allowing
the resultant data samples to be monitored digitally at the
Rx output.
2
RxDPAccessSel
High
RW
When set active this bit disables the Rx Data path sample
clock, thereby enabling the Data path access register to
directly update the output of the Rx Data path operator.
1
TxDPAccessSel
High
RW
When set active this bit disables the Tx Data path sample
clock, thereby enabling the Data path access register to
directly update the input to the 15-tap digital filter without
the data being overridden by subsequent sample clocks
0
TxtoRxDataPath
High
RW
When set active this bit connects the Tx (I,Q) DAC input to
the serial receive port (Rx). This enables the output of the
transmit 15-tap filter to be observed in real time. Data is
taken from the I and Q channels on alternate 144kHz
sample clocks.
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相关代理商/技术参数 |
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| FX981006 | 制造商:Thomas & Betts 功能描述: |
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