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参数资料
| 型号： | IDT49C465PQF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 算术逻辑单元 |
| 英文描述： | 49C SERIES, 32-BIT ERROR DETECT AND CORRECT CKT, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 1/39页 |
| 文件大小： | 299K |
| 代理商： | IDT49C465PQF8 |
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IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
COMMERCIAL TEMPERATURE RANGE
NOVEMBER 2000
1999 Integrated Device Technology, Inc.
DSC-2552/9
c
IDT49C465
IDT49C465A
COMMERCIAL TEMPERATURE RANGE
64-BIT FLOW-THRU
ERROR DETECTION
AND CORRECTION UNIT
DESCRIPTION:
The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit. The
chip provides single-error correction and two and three bit error detec-
tion of both hard and soft memory errors. It can be expanded to 64-bit
widths by cascading two units, without the need for additional external
logic. The Flow-thruEDC has been optimized for speed and simplicity
of control.
The EDC unit has been designed for use in either of two configura-
tions in an error correcting memory system. The bidirectional configu-
ration is most appropriate for systems using bidirectional memory
buses. A second system configuration utilizes external octal buffers,
and is well-suited for systems using memory with separate I/O buses.
The IDT49C465/A supports partial word writes, pipelining, and error
diagnostics. It also provides parity protection for data on the system
side.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
CBO 0-7
Memory
Checkbit
Generator
S
y
n
d
ro
m
e
G
e
n
e
ra
to
r
Correct
Logic
E
x
p
a
n
s
io
n
L
o
g
ic
Detect
Logic
Mux
System
Checkbit
Generator
Byte
Mux
P
ip
e
li
n
e
L
a
tc
h
Mux
Checkbit
Latch
MD
Latch
MLE
SD0-31
ER R
MERR
CBI0-7
PC B I0-7
PLE
MD0-31
SLE
CONTROL
SD
Latch
CONTROL
FEATURES:
32-bit wide Flow-thruEDC unit, cascadable to 64 bits
Single-chip 64-bit Generate Mode
Separate system and memory buses
On-chip pipeline latch with external control
Supports bidirectional and common I/O memories
Corrects all single-bit errors
Detects all double-bit errors and some multiple bit errors
Error Detection Time — 12ns
Error Correction Time — 14ns
On chip diagnostic registers
Parity generation and checking on system data bus
Low power CMOS — 100mA typical at 20MHz
144-pin PGA and PQFP packages
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
相关PDF资料 |
PDF描述 |
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| IDT49FCT818AEB | 8-BIT, DSP-PIPELINE REGISTER, CDFP24 |
| IDT49FCT818P | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
| IDT49FCT818L | 8-BIT, DSP-PIPELINE REGISTER, CQCC28 |
| IDT49FCT818LB | 8-BIT, DSP-PIPELINE REGISTER, CQCC28 |
| IDT49FCT818PB | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT49C465PQFB | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466A | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466APQF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466GB | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Error Detection & Correction (EDAC) |
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