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参数资料
| 型号： | IDT70T631S |
| 厂商： | Integrated Device Technology, Inc. |
| 英文描述： | 122 x 32 pixel format, Compact LCD size |
| 中文描述： | 高速2.5V的512/256K与3.3V 5011 2.5V的接口× 18 ASYNCHRONO美国双端口静态RAM |
| 文件页数： | 25/27页 |
| 文件大小： | 342K |
| 代理商： | IDT70T631S |
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IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Sleep Mode
The IDT70T633/1 is equipped with an optional sleep or low power
mode on both ports. The sleep mode pin on both ports s active high. During
normal operation, the ZZ pin is pulled low. When ZZ is pulled high, the
port will enter sleep mode where it will have the lowest possible power
consumption. The sleep mode timing diagram demonstrates the modes of
operation: Normal Operation, No Read/Write Allowed and Sleep Mode.
For a period of time prior to sleep mode and after recovering from sleep
Preliminary
NOTES:
1. Guaranteed by design.
2. 30pF loading on external output signals.
3. Refer to AC Electrical Test Conditions stated earlier in this document.
4. JTAG operations occur at one speed (10MHz). The base device may run at
any speed specified in this datasheet.
5. JTAG cannot be tested in sleep mode.
JTAG Timing Specifications
TCK
Device Inputs
(1)
/
TDI/TMS
Device Outputs
(2)
/
TDO
TRST
t
JCD
t
JDC
t
JRST
t
JS
t
JH
t
JCYC
t
JRSR
t
JF
t
JCL
t
JR
t
JCH
5670 drw 23
x
NOTES:
1. Device inputs = All device inputs except TDI, TMS, and TRST.
2. Device outputs = All device outputs except TDO.
JTAG AC Electrical
Characteristics
(1,2,3,4,5)
70T633/1
Symbol
Parameter
Min.
Max.
Units
t
JCYC
JTAG Clock Input Period
100
____
ns
t
JCH
JTAG Clock HIGH
40
____
ns
t
JCL
JTAG Clock Low
40
____
ns
t
JR
JTAG Clock Rise Time
____
3
(1)
ns
t
JF
JTAG Clock Fall Time
____
3
(1)
ns
t
JRST
JTAG Reset
50
____
ns
t
JRSR
JTAG Reset Recovery
50
____
ns
t
JCD
JTAG Data Output
____
25
ns
t
JDC
JTAG Data Output Hold
0
____
ns
t
JS
JTAG Setup
15
____
ns
t
JH
JTAG Hold
15
____
ns
5670 tbl 20
mode (t
ZZS
and t
ZZR
), new reads or writes are not allowed. If a write or read
operation occurs during these periods, the memory array may be
corrupted. Validity of data out from the RAM cannot be guaranteed
immediately after ZZ is asserted (prior to being in sleep).
During sleep mode the RAM automatically deselects tself and discon-
nects ts nternal buffer. All outputs will remain n high-Z state while n sleep
mode. All nputs are allowed to toggle, but the RAM will not be selected and
will not perform any reads or writes.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT70T631S10BC | 功能描述:IC SRAM 4MBIT 10NS 256BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:1.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
| IDT70T631S10BC8 | 功能描述:IC SRAM 4MBIT 10NS 256BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:1.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
| IDT70T631S10BCI | 功能描述:IC SRAM 4MBIT 10NS 256BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:1.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
| IDT70T631S10BCI8 | 功能描述:IC SRAM 4MBIT 10NS 256BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:1.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
| IDT70T631S10BF | 功能描述:IC SRAM 4MBIT 10NS 208FBGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:1.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) |
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