参数资料
型号: IDT82P20416DBFG
厂商: IDT, Integrated Device Technology Inc
文件页数: 110/121页
文件大小: 0K
描述: IC LIU T1/E1/J1 16CH SH 484BGA
标准包装: 84
功能: 线路接口单元(LIU)
接口: E1,J1,T1
电路数: 16
电源电压: 1.8V, 3.3V
功率(瓦特): 3.10W
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 484-LFBGA
供应商设备封装: 484-CABGA(19x19)
包装: 托盘
包括: AIS 警报检测器和发生器,回送功能,PRBS 发生器 / 检测器,远程检测器和发生器
IDT82P20416
16-CHANNEL SHORT HAUL T1/E1/J1 LINE INTERFACE UNIT
Programming Information
89
December 17, 2009
INTS0 - Interrupt Status Register 0
Address: 020H, 060H, 0A0H, 0E0H, 120H, 160H, 1A0H, 1E0H, (CH1~CH8)
220H, 260H, 2A0H, 2E0H, 320H, 360H, 3A0H, (CH9~CH15)
7E0H (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7
DAC_IS
This bit indicates the interrupt status of the waveform amplitude overflow.
0: No waveform amplitude overflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: Waveform amplitude overflow interrupt is generated and is reported by the INT pin.
6
TJA_IS
This bit indicates the interrupt status of the TJA FIFO overflow or underflow.
0: No TJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
5
RJA_IS
This bit indicates the interrupt status of the RJA FIFO overflow or underflow.
0: No RJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: RJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
4
TOC_IS
This bit indicates the interrupt status of the Line Driver TOC.
0: No TOC interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TOC interrupt is generated and is reported by the INT pin. When the TOC_IES bit (b4, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’; when the TOC_IES bit (b4, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’.
3
TCKLOS_IS
This bit indicates the interrupt status of the TCLKn missing.
0: No TCLKn missing interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TCLKn missing interrupt is generated and is reported by the INT pin. When the TCKLOS_IES bit (b3, INTES,...) is ‘0’, a transi-
tion from ‘0’ to ‘1’ on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’; when the TCKLOS_IES bit (b3, INTES,...) is ‘1’, any tran-
sition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’.
2
TLOS_IS
This bit indicates the interrupt status of TLOS.
0: No TLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TLOS interrupt is generated and is reported by the INT pin. When the TLOS_IES bit (b2, INTES,...) is ‘0’, a transition from ‘0’
to ‘1’ on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’; when the TLOS_IES bit (b2, INTES,...) is ‘1’, any transition (from ‘0’ to
‘1’ or from ‘1’ to ‘0’) on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’.
1
SLOS_IS
This bit indicates the interrupt status of the SLOS.
0: No SLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: SLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’.
0
LLOS_IS
This bit indicates the interrupt status of the LLOS.
0: No LLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: LLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’.
7
654
321
0
DAC_IS
TJA_IS
RJA_IS
TOC_IS
TCKLOS_IS
TLOS_IS
SLOS_IS
LLOS_IS
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