- 您现在的位置：买卖IC网 > PDF目录1924 > IDT82P20416DBFG (IDT, Integrated Device Technology Inc)IC LIU T1/E1/J1 16CH SH 484BGA PDF资料下载
参数资料
| 型号： | IDT82P20416DBFG |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 57/121页 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 16CH SH 484BGA |
| 标准包装： | 84 |
| 功能： | 线路接口单元（LIU） |
| 接口： | E1，J1，T1 |
| 电路数： | 16 |
| 电源电压： | 1.8V, 3.3V |
| 功率（瓦特）： | 3.10W |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 484-LFBGA |
| 供应商设备封装： | 484-CABGA（19x19） |
| 包装： | 托盘 |
| 包括： | AIS 警报检测器和发生器，回送功能，PRBS 发生器 / 检测器，远程检测器和发生器 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页当前第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页
IDT82P20416
16-CHANNEL SHORT HAUL T1/E1/J1 LINE INTERFACE UNIT
Functional Description
40
December 17, 2009
Inband Loopback (IB) Detection
The IB detection is in compliance with ANSI T1.403.
The extracted data is used to compare with the target IB code. The
length of the target activate/deactivate IB code can be 3 to 8 bits, as
determined by the IBAL[1:0]/IBDL[1:0] bits (b3~2/b1~0, IBL,...). The
content of the target activate/deactivate IB code is programmed in the
IBA[7:0]/IBD[7:0] bits (b7~0, IBDA/IBDD,...). Refer to Figure-22.
Figure-22 IB Detection
During comparison, if the extracted data coincides with the target
activate/deactivate IB code with no more than 10-2 bit error rate for a
certain period, the IB code is detected. The period depends on the
setting of the AUTOLP bit (b3, LOOP,...).
If the AUTOLP bit (b3, LOOP,...) is ‘0’, Automatic Digital/Remote
Loopback is disabled. In this case, when the activate IB code is detected
for more than 40 ms, the IBA_S bit (b1, STAT1,...) will be set to indicate
the activate IB code detection; when the deactivate IB code is detected
for more than 40 ms (T1/J1 mode) / 30 ms (E1 mode), the IBD_S bit (b0,
STAT1,...) will be set to indicate the deactivate IB code detection.
If the AUTOLP bit (b3, LOOP,...) is ‘1’, Automatic Digital/Remote
Loopback is enabled. In this case, when the activate IB code is detected
for more than 5.1 seconds, the IBA_S bit (b1, STAT1,...) will be set to
indicate the activate IB code detection. The detection of the activate IB
code in the receive path will activate Remote Loopback or the detection
of the activate IB code in the transmit path will activate Digital Loopback
Loopback). When the deactivate IB code is detected for more than 5.1
seconds, the IBD_S bit (b0, STAT1,...) will be set to indicate the deacti-
vate IB code detection. The detection of the deactivate IB code in the
receive path will deactivate Remote Loopback or the detection of the
deactivate IB code in the transmit path will deactivate Digital Loopback
A transition from ‘0’ to ‘1’ on the IBA_S/IBD_S bit (b1/b0, STAT1,...)
or any transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the IBA_S/IBD_S bit
(b1/b0, STAT1,...) will set the IBA_IS/IBD_IS bit (b1/b0, INTS1,...) to ‘1’
respectively, as selected by the IB_IES bit (b0, INTES,...). When the
IBA_IS/IBD_IS bit (b1/b0, INTS1,...) is ‘1’, an interrupt will be reported
3.5.6
ERROR COUNTER
An internal 16-bit Error Counter is used to count one of the following
errors:
LBPV: BPV/CV detected in the receive path (line side);
LEXZ: EXZ detected in the receive path (line side);
LBPV + LEXZ: BPV/CV and EXZ detected in the receive path (line
side);
SBPV: BPV/CV detected in the transmit path (system side) (dis-
abled in Transmit Single Rail NRZ Format mode);
SEXZ: EXZ detected in the transmit path (system side);
SBPV + SEXZ: BPV/CV and EXZ detected in the transmit path
(system side) (disabled in Transmit Single Rail NRZ Format
mode);
PRBS/ARB error.
The CNT_SEL[2:0] bits (b4~2, ERR,...) select one of the above
errors to be counted.
The Error Counter is buffered. It is updated automatically or manu-
ally, as determined by the CNT_MD bit (b1, ERR,...).
The Error Counter is accessed by reading the ERRCH and ERRCL
registers.
3.5.6.1 Automatic Error Counter Updating
When the CNT_MD bit (b1, ERR,...) is ‘1’, the Error Counter is
updated every one second automatically.
The one-second timer uses MCLK as clock reference. The expiration
of each one second will set the TMOV_IS bit (b0, INTTM) and induce an
When each one second expires, the Error Counter transfers the
accumulated error numbers to the ERRCH and ERRCL registers and
the Error Counter will be cleared to start a new round counting. The
ERRCH and ERRCL registers should be read in the next second, other-
wise they will be overwritten.
When the ERRCH and ERRCL registers are all ‘1’s and there is still
error to be accumulated, the registers will be overflowed. The overflow is
indicated by the CNTOV_IS bit (b0, INTS2,...) and will induce an inter-
The process of automatic Error Counter updating is illustrated in
from Rx path
or Tx path
Decoding
Target code -
length & content
programming
Comparison
相关PDF资料 |
PDF描述 |
|---|---|
| IDT82P20516DBFG | IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P2281PF | TXRX T1/E1/J1 LONG/SHORT 80-TQFP |
| IDT82P2282PF | TXRX T1/J1/E1 2CHAN 100-TQFP |
| IDT82P2284BB | TXRX T1/J1/E1 4CHAN 208-PBGA |
| IDT82P2288BBG | TXRX OCTAL T1/E1/J1 256-PBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT82P20416DBFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P20416DBFGBLANK | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:16-Channel Short Haul T1/E1/J1 Line Interface Unit |
| IDT82P20516 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit |
| IDT82P20516BFBLANK | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit |
| IDT82P20516BFGBLANK | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit |
发布紧急采购，3分钟左右您将得到回复。