参数资料
| 型号： | IP-ASI |
| 厂商： | Altera |
| 文件页数： | 11/27页 |
| 文件大小： | 0K |
| 描述： | IP VIDEO INTERFACE - ASI |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 数字视频广播用接收器/收发器 |
| 许可证： | 初始许可证 |
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2–2
1
Chapter 2: Getting Started
Design Flow
The ASI MegaCore function is in the Interface > ASI directory.
3. Specify the parameters on all pages in the Parameter Settings tab.
f For detailed explanation of the parameters, refer to the “Parameter
4. On the EDA tab, turn on Generate simulation model to generate an IP functional
simulation model for the MegaCore function.
An IP functional simulation model is a cycle-accurate VHDL or Verilog HDL
model produced by the Quartus II software.
c
1
Use the simulation models only for simulation and not for synthesis or any
other purposes. Using these models for synthesis creates a nonfunctional
design.
Some third-party synthesis tools can use a netlist that contains only the
structure of the MegaCore function, but not detailed logic, to optimize
performance of the design that contains the MegaCore function. If your
synthesis tool supports this feature, turn on Generate netlist .
5. On the Summary tab, select the files you want to generate. A gray checkmark
indicates a file that is automatically generated. All other files are optional.
f For more information about the files generated in your project directory,
refer to Table 2–1 .
6. Click Finish to generate the MegaCore function and supporting files.
7. If you generate the MegaCore function instance in a Quartus II project, you are
prompted to add the .qip files to the current Quartus II project.
1
The .qip file is generated by the MegaWizard interface, and contains
information about the generated IP core. In most cases, the .qip file contains
all of the necessary assignments and information required to process the
MegaCore function or system in the Quartus II compiler. The MegaWizard
interface generates a single .qip file for each MegaCore function.
8. After you review the generation report, click Exit to close the MegaWizard Plug-In
Manager.
Asynchronous Serial Interface (ASI) MegaCore Function User Guide
January 2014 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| IP-ED8B10B | IP 8B10B ENCODER/DECODER |
| IP-FFT | IP FFT/IFFT |
| IP-FIR | IP FIR COMPILER |
| IP-NCO | IP NCO COMPILER |
| IP-NIOS | IP NIOS II MEGACORE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPB009N03L G | 功能描述:MOSFET OptiMOS 3 PWR TRANS 30V 180A RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| IPB009N03LG | 制造商:Infineon Technologies AG 功能描述:MOSFET N-Ch 30V 180A OptiMOS3 TO263-7 |
| IPB009N03LGATMA1 | 制造商:Infineon Technologies AG 功能描述:Trans MOSFET N-CH 30V 180A 7-Pin(6+Tab) TO-263 制造商:Infineon Technologies AG 功能描述:N-KANAL POWER MOS - Tape and Reel 制造商:Infineon Technologies AG 功能描述:MOSFET N-CH 30V 180A TO263-7 |
| IPB010N06N | 功能描述:MOSFET 60V TO-263 RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| IPB010N06NATMA1 | 功能描述:MOSFET MV POWER MOS RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
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