参数资料
| 型号： | IP-ASI |
| 厂商： | Altera |
| 文件页数： | 6/27页 |
| 文件大小： | 0K |
| 描述： | IP VIDEO INTERFACE - ASI |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 数字视频广播用接收器/收发器 |
| 许可证： | 初始许可证 |
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1–2
Table 1–2. Device Family Support (Part 2 of 2)
Chapter 1: About This MegaCore Function
Features
Device Family
Cyclone III LS (1)
Cyclone IV GX (2)
Cyclone IV E (1.2V)
Stratix ? III (1)
Stratix IV (3)
Other device families
Preliminary
Preliminary
Preliminary
Final
Final
No support
Support
Notes to Table 1–2 :
(1) The Cyclone series of devices and the Stratix III devices only support soft SERDES.
(2) Cyclone IV GX support includes all density in the device family except the EP4CGX15, EP4CGX22, and EP4CGX30
(excluding the EP4CGX30F484 pin package) devices.
(3) Stratix IV GT only supports soft logic mode.
Features
This section summarizes the features of the ASI MegaCore function.
■
■
■
IP functional simulation models for use in Altera-supported VHDL and Verilog
HDL simulators
Easy-to-use MegaWizard TM interface
Support for OpenCore Plus evaluation
General Description
The ASI MegaCore function demonstrates how to transmit or receive packets over an
ASI. The ASI MegaCore function works with 270 megabits per second (Mbps) DVB-
ASI, as defined by the DVB-ASI specification EN 50083-9 from CENELEC / December
2002 “Cable networks for television signals, sound signals and interactive services. Part 9:
Interfaces for CATV/SMATV head-ends and similar professional equipment for DVB/MPEG2
transport streams” .
f For information on ASI MegaCore function demonstration on the Altera Cyclone
MegaCore Verification
The ASI MegaCore verification involves the testing of the DVB-ASI specification
EN 50083-9 from CENELEC / December 2002 “Cable networks for television signals, sound
signals and interactive services. Part 9: Interfaces for CATV/SMATV head-ends and similar
professional equipment for DVB/MPEG2 transport streams” .
Asynchronous Serial Interface (ASI) MegaCore Function User Guide
January 2014 Altera Corporation
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