参数资料
| 型号： | IP-RSDEC |
| 厂商： | Altera |
| 文件页数： | 20/38页 |
| 文件大小： | 0K |
| 描述： | IP REED-SOLOMON DECODER |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Reed-Solomon 解码器 |
| 许可证： | 初始许可证 |
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2–10
Chapter 2: Getting Started
Compile the Design
2. Check that the absolute path to your third-party simulator executable is set. On the
Tools menu click Options and select EDA Tools Options .
3. On the Processing menu, point to Start and click Start Analysis & Elaboration .
4. On the Tools menu click Tcl scripts . Select the the < variation name > _nativelink.tcl
Tcl script and click Run . Check for a message confirming that the Tcl script was
successfully loaded.
5. On the Assignments menu click Settings , expand EDA Tool Settings and select
Simulation . Select a simulator under Tool Name .
6. On the Tools menu point to EDA Simulation Tool and click EDA RTL
Simulation .
Compile the Design
You can use the Quartus II software to compile your design. Refer to Quartus II Help
for instructions on performing compilation.
Program a Device
After you have compiled your design, program your targeted Altera device and
verify your design in hardware.
With Altera's free OpenCore Plus evaluation feature, you can evaluate an RS
MegaCore function before you purchase a license. OpenCore Plus evaluation allows
you to generate an IP functional simulation model and produce a time-limited
programming file.
f For more information about IP functional simulation models, refer to the Simulating
Altera Designs chapter in volume 3 of the Quartus II Handbook .
You can simulate an RS MegaCore function in your design and perform a time-limited
evaluation of your design in hardware.
Fore more information about OpenCore Plus hardware evaluation using the RS
Compiler, refer to “OpenCore Plus Evaluation” on page 1–6 .
Reed-Solomon Compiler
User Guide
November 2013 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| IP-SDI | IP VIDEO INTERFACE - SDI |
| IP-SDRAM/DDR2 | IP DDR2 SDRAM CONTROLLER |
| IP-SLITE2 | IP SERIALLITE II |
| IP-SRAM/QDRII | IP QDRII SRAM CONTROLLER |
| IP-VITERBI/SS | IP VITERBI LOW-SPEED |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SDI | 功能描述:开发软件 Video Interface SDI MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDI-II | 功能描述:开发软件 SDI II Video MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDRAM/DDR | 功能描述:开发软件 DDR SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDRAM/DDR2 | 功能描述:开发软件 DDR2 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDRAM/DDR3 | 功能描述:开发软件 DDR3 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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