参数资料
型号: IP-RSDEC
厂商: Altera
文件页数: 7/38页
文件大小: 0K
描述: IP REED-SOLOMON DECODER
标准包装: 1
系列: *
类型: MegaCore
功能: Reed-Solomon 解码器
许可证: 初始许可证
Chapter 1: About This Compiler
Performance and Resource Utilization
Table 1–2. Device Family Support (Part 2 of 2)
Device Family
Support
1–3
Cyclone ?
III
Final
Cyclone III LS
Cyclone IV GX
Stratix II GX
Stratix ? III
Stratix IV GT
Stratix IV GX/E
Stratix V
Stratix GX
Other device families
Final
Final
Final
Final
Final
Final
Full
Final
No support
Performance and Resource Utilization
Table 1–3 shows the typical performance using the Quartus II software for Cyclone III
(EP3C10F256C6) devices.
1
Cyclone III devices use combinational look-up tables (LUTs) and logic registers;
Stratix III and Stratix IV devices use combinational adaptive look-up tables (ALUTs)
and logic registers.
Table 1–3. Performance—Cyclone III Devices
Parameters
Options
Standard decoder
Standard decoder
Split bit error decoder
Full bit error decoder
Standard decoder
Variable decoder
Erasures decoder
Erasures and variable decoder
Standard encoder
Variable encoder
Variable encoder
Keysize
Half
Half
Half
Half
Half
Half
Half
Half
Bits
(1)
4
8
8
8
8
8
8
8
8
8
8
Symbols
(2)
15
204
204
204
255
204
204
204
204
204
204
Check
(3)
6
16
16
16
32
16
16
16
16
16
32
LUTs
541
1,720
1,765
1,778
2,972
1,886
3,151
3,465
256
1,048
2,341
Logic
Registers
365
995
1,057
1,058
1,676
1,074
1,561
1,704
210
313
580
Memory
(M9K)
5
5
5
5
5
5
5
6
f MAX
(MHz)
230
202
194
190
193
202
188
191
324
237
227
Throughput
(Mbps)
216
1,613
1,552
1,519
1,213
1,620
1,500
1,527
2,593
1,897
1,813
Notes to Table 1–3 :
(1) The number of bits per symbol ( m ).
(2) The number of symbols per codeword ( N ).
(3) The number of check symbols per codeword ( R ).
November 2013
Altera Corporation
Reed-Solomon Compiler
User Guide
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