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参数资料
| 型号： | IR3514MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 4/46页 |
| 文件大小： | 0K |
| 描述： | IC XPHASE3 CONTROL HYBRD 40-MLPQ |
| 产品变化通告： | (EP) Parts Discontinuation 25/May/2012 |
| 标准包装： | 1 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-MLPQ |
| 供应商设备封装： | 40-MLPQ（6x6） |
| 包装： | 标准包装 |
| 产品目录页面： | 1383 (CN2011-ZH PDF) |
| 其它名称： | IR3514MTRPBFDKR |
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IR3514
PIN DESCRIPTION CONTINUED:
PIN#
27
28
29
30
31
32
33
34
35
36
37
38
39
40
PIN SYMBOL
ROSC/OVP
PSI_L
LGND
NC
CLKOUT
PHSOUT
PHSIN
VCCL
VCCLFB
VCCLDRV
VRRDY
SVC/VID3
SVD/VID2
VID1
PIN DESCRIPTION
Connect a resistor to LGND to program oscillator frequency and OCSET1,
OCSET2, FB1, VDAC1, and VDAC2 bias currents. Oscillator frequency equals
switching frequency per phase. The pin voltage is 0.6V during normal operation
and higher than 1.6V if over-voltage condition is detected.
Digital output to communicate PSI_L to Phase Ics.
Local ground for internal circuitry and IC substrate connection
No Connection
Clock output at switching frequency multiplied by phase number. Connect to
CLKIN pins of phase ICs.
Phase clock output at switching frequency per phase. Connect to PHSIN pin of
the first phase IC.
Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
Output of the voltage regulator, and power input for clock oscillator circuitry.
Connect a decoupling capacitor to LGND.
Non-inverting input of the voltage regulator error amplifier. Output voltage of the
regulator is programmed by a resistor divider connected to VCCL.
Output of the VCCL regulator error amplifier to control an external pass
transistor. The pin senses 12V power supply through a resistor.
Open collector output. It is asserted in SVI mode when both outputs are
regulated. It is asserted in PVI mode when VDD output is regulated. Connect
external pull-up.
In SVI mode, SVC (Serial VID Clock) is an input to IR3514 that is driven by an
open drain output of the processor. In PVI mode, this pin functions as the VID3
input. It requires an external pull-up and should not be floated.
In SVI mode, SVD (Serial VID Data) is a bidirectional signal that is an input and
open drain output for both the AMD processor and the IR3514. In PVI mode, this
pin functions as the VID2. It requires an external pull-up and should not be
floated.
This pin determines the control mode of the IR3514, either SVI or PVI. SVI
mode is selected if VID1=0 upon Enable. PVI mode is selected if VID1=1 upon
Enable. It requires an external pull-up and should not be floated.
Page 4 of 46
10/30/2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3515SPBF | 制造商:International Rectifier 功能描述:MOSFET, Power;N-Ch;VDSS 150V;RDS(ON) 0.045Ohm;ID 41A;D2Pak;PD 200W;VGS +/-30V |
| IR3519 | 制造商:IRF 制造商全称:International Rectifier 功能描述:Synchronous MOSFET GateDriver IC |
| IR3519MTRPBF | 功能描述:功率驱动器IC SYNC MOSFET GATE DRVR IC RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| IR3519STRPBF | 功能描述:功率驱动器IC SYNC FET Gate DRVR 15ms 3.3 and 5V 0.4 RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| IR3521 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM AMD SVID CONTROL IC |
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