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参数资料
| 型号： | IRF530 |
| 厂商： | MOTOROLA INC |
| 元件分类： | JFETs |
| 英文描述： | 100V，14A TMOS Power Field Effect Transistor （N-Channel Enhancement Mode Silicon Gate）(100V，14A TMOS功率场效应管（N沟道增强型硅门）) |
| 中文描述： | 14 A, 100 V, 0.14 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 封装： | CASE 221A-09, 3 PIN |
| 文件页数： | 5/8页 |
| 文件大小： | 166K |
| 代理商： | IRF530 |
IRF530
5
Motorola TMOS Power MOSFET Transistor Device Data
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
0.6
0.7
0.8
0.9
0
4
10
12
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
I S
,SOURCE
CURRENT
(AMPS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
RG, GATE RESISTANCE (OHMS)
1
10
100
10
t,TIME
(ns)
tr
tf
td(off)
td(on)
VGS = 0 V
TJ = 25°C
Figure 10. Diode Forward Voltage versus Current
80
V
GS
,GA
TE–T
O–SOURCE
VOL
TAGE
(VOL
TS)
72
64
56
48
40
32
0
9
7
4
0
QG, TOTAL GATE CHARGE (nC)
V
DS
,DRAIN–T
O–SOURCE
VOL
TAGE
(VOL
TS)
10
8
2
510
15
20
TJ = 25°C
ID = 14 A
VDS
VGS
25
0
Q1
Q2
QT
Q3
2
6
0.65
0.75
0.85
0.95
TJ = 25°C
ID = 8 A
VDD = 36 V
VGS = 10 V
6
5
3
1
24
16
8
1
8
14
2.5
7.5
12.5
17.5
22.5
27.5
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is for-
ward biased. Curves are based upon maximum peak junc-
tion temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance–General
Data and Its Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded and the transition time
(tr,tf) do not exceed 10 s. In addition the total power aver-
aged over a complete switching cycle must not exceed
(TJ(MAX) – TC)/(R
θJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For reli-
able operation, the stored energy from circuit inductance dis-
sipated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a con-
stant. The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of drain–
to–source avalanche at currents up to rated pulsed current
(IDM), the energy rating is specified at rated continuous cur-
rent (ID), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous ID can safely be assumed to
equal the values indicated.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IRF-530 | 制造商:International Rectifier 功能描述: |
| IRF530/D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:N-Channel Enhancement-Mode Silicon Gate |
| IRF530_R4941 | 功能描述:MOSFET USE 512-IRF530A RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| IRF5305 | 功能描述:MOSFET MOSFET, P-CHANNEL, -55V, -31A, 60 mOhm, 42 nC Qg, TO-220AB RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| IRF5305L | 功能描述:MOSFET P-CH 55V 31A TO-262 RoHS:否 类别:分离式半导体产品 >> FET - 单 系列:HEXFET® 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门 漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔 封装/外壳:TO-220-3 整包 供应商设备封装:TO-220FP 包装:管件 |
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