参数资料
| 型号： | ISL6308ACRZ |
| 厂商： | Intersil |
| 文件页数： | 8/28页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 3PHASE 40-QFN |
| 标准包装： | 500 |
| 应用： | 控制器，DDR |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 2.3 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘 |
| 供应商设备封装： | 40-QFN（6x6） |
| 包装： | 管件 |
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ISL6308A
Functional Pin Description
VCC (Pin 6)
Bias supply for the IC’s small-signal circuitry. Connect this
pin to a +5V supply and locally decouple using a quality
1.0μF ceramic capacitor.
PVCC1, PVCC2, PVCC3 (Pins 33, 24, 18)
Power supply pins for the corresponding channel MOSFET
drive. These pins can be connected to any voltage from +5V
to +12V, depending on the desired MOSFET gate drive level.
Note that tying PVCC2 OR PVCC3 to GND has the same
effect as tying 2PH or 3PH to GND for disabling the
corresponding phase
GND (Pin 41)
Bias and reference ground for the IC.
ENLL (Pin 37)
This pin is a threshold sensitive (approximately 0.66V) enable
input for the controller. Held low, this pin disables controller
operation. Pulled high, the pin enables the controller for
operation.
FS (Pin 36)
A resistor, placed from FS to ground, will set the switching
frequency. Refer to Equation 43 and Figure 23 for proper
resistor calculation.
3PH and 2PH (Pins 1, 2)
These pins decide how many phases the controller will
operate. Tying both pins to VCC allows for 3-phase operation.
Tying the 3PH pin to GND causes the controller to operate in
2-phase mode, while connecting both 3PH and 2PH GND will
allow for single phase operation.
REF0 and REF1 (Pins 40, 39)
These pins make up the 2-bit input that selects the fixed
DAC reference voltage. These pins respond to TTL logic
thresholds. The ISL6308A decodes these inputs to establish
one of four fixed reference voltages; see Table 1 for
correspondence between REF0 and REF1 inputs and
reference voltage settings.
These pins are internally pulled high, to approximately 1.2V,
by 40μA (typically) internal current sources; the internal
pull-up current decreases to 0 as the REF0 and REF1
voltages approach the internal pull-up voltage. Both REF0
and REF1 pins are compatible with external pull-up voltages
not exceeding the IC’s bias voltage (VCC).
RGND and VSEN (Pins 10, 11)
RGND and VSEN are inputs to the precision differential
remote-sense amplifier and should be connected to the
sense pins of the remote load.
8
ICOMP, ISUM, and IREF (Pins 13, 15, 16)
ISUM, IREF, and ICOMP are the DCR current sense
amplifier ’s negative input, positive input, and output
respectively. For accurate DCR current sensing, connect a
resistor from each channel’s phase node to ISUM and
connect IREF to the summing point of the output inductors.
A parallel R-C feedback circuit connected between ISUM
and ICOMP will then create a voltage from IREF to ICOMP
proportional to the voltage drop across the inductor DCR.
This voltage is referred to as the droop voltage and is added
to the differential remote-sense amplifier ’s output.
An optional 0.001μF to 0.01μF ceramic capacitor can be
placed from the IREF pin to the ISUM pin to help reduce
common mode noise that might be introduced by the layout.
DROOP (Pin 14)
This pin enables or disables droop. Tie this pin to the ICOMP
pin to enable droop. To disable droop, tie this pin to the IREF
pin.
VDIFF (Pin 9)
VDIFF is the output of the differential remote-sense
amplifier. The voltage on this pin is equal to the difference
between VSEN and RGND added to the difference between
IREF and ICOMP. VDIFF therefore represents the VOUT
voltage plus the droop voltage.
COMP and FB (Pins 7, 8)
The internal error amplifier ’s inverting input and output
respectively. FB is connected to VDIFF through an external
R or R-C network depending on the desired type of
compensation (Type II or III). COMP is tied back to FB
through an external R-C network to compensate the
regulator.
DAC (Pin 3)
The DAC pin is the direct output of the internal DAC. This pin
is connected to the REF pin using a 1k Ω to 5k Ω resistor.
This pin can be left open if an external reference is used.
REF (Pin 4)
The REF input pin is the positive input of the error amplifier.
This pin can be connected to the DAC pin using a resistor
(1k Ω to 5k Ω ) when the internal DAC voltage is used as the
reference voltage. When an external voltage reference is
used, it must be connected directly to the REF pin, while the
DAC pin is left unconnected. The output voltage will be
regulated to the voltage at the REF pin unless this voltage
is greater than the voltage at the DAC pin. If an external
reference is used at this pin, its magnitude cannot exceed
1.75V.
A capacitor is used between the REF pin and ground to
smooth the DAC voltage during soft-start.
FN6669.0
September 9, 2008
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6308ACRZR5609 | 制造商:Intersil Corporation 功能描述:PB-FREE DAC-LESS MULTI-PHASE PWM CONTR W/3-DRIVERS, HARD WI - Rail/Tube |
| ISL6308ACRZ-T | 功能描述:IC CTRLR PWM BUCK 3PHASE 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6308ACRZ-TR5609 | 制造商:Intersil Corporation 功能描述:PB-FREE DAC-LESS MULTI-PHASE PWM CONTR W/3-DRIVERS, HARD WIR - Tape and Reel |
| ISL6308AEVAL1Z | 功能描述:EVALUATION BOARD FOR ISL6308A RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6308AIRZ | 功能描述:IC CTRLR PWM BUCK 3PHASE 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
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