参数资料
| 型号： | ISL8120IRZEC |
| 厂商： | Intersil |
| 文件页数： | 27/33页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-QFN |
| 标准包装： | 60 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 90% |
| 电源电压： | 3 V ~ 22 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页当前第27页第28页第29页第30页第31页第32页第33页
ISL8120IR
channels’ error amplifiers should be disabled with their
corresponding VSEN- pulled to VCC, as shown in Figure 15.
Current Share Control Loop in Multi-Module with
Independent Voltage Loop
The power module controlled by ISL8120IRZEC with its own
voltage loop can be paralleled to supply one common output
load with its integrated Master-Slave current sharing control,
VSEN1- pin and the lower resistor of the voltage sense
resistor divider for each module. With this resistor, the
correction current sourcing from VSEN1- pin will create a
voltage offset to maintain even current sharing among
modules. The recommended value for the VSEN1- resistor
precision 1.2V threshold (±1%, 50mV hysteresis); while the
105μA OCP comparator with 7-cycle delay is also activated.
In multiphase operation, the V ISHARE represents the
average current of all active channels and compares with a
precision 1.2V threshold (±1%, 50mV hysteresis) to
determine the overcurrent condition, while each channel has
additional overcurrent trip point at 105μA with 7-cycle delay.
This scheme helps protect against loss of channel(s) in
multi-phase mode so that no single channel could carry
more than 105μA in such event. See Figure 13. Note that it
is not necessary for the R ISHARE to be scaled to trip at the
same level as the 105μA OCP comparator if the application
allows. For instance, when Channel 1 operates
independently, the OC trip set by 1.2V comparator can be
lower than 105μA trip point as shown in Equation 6.
? ---------- + ---------------- ? ? ? ---------------- – t MIN_OFF ? ? ? ? DCR
? ?
2F SW
R ISEN1 = ----------------------------------------------------------------------------------------------------------------------
R ISHARE = ---------------
R ISET = R ISHARE ? N CNTL
R CSR is 100 Ω and it should not be large in order to keep the
unity gain amplifier input pin impedance compatibility. The
maximum source current from VSEN1- pin is 350μA, which
is combined with R CSR to determine the current sharing
regulation range. The generated correction voltage on R CSR
is suggested to be within 5% of VREF (0.6V) to avoid fault
? I OC V OUT 1 – D ?
N L
1V
I TRIP
I TRIP
(EQ. 6)
trigging of UV/OV and PGOOD during dynamic events.
To attain good current balance in system start up preventing
single module from overcurrent, the paralleled modules are
recommended to be synchronized and the enable pins (EN/FF)
should be tied together to initial start-up at the same instant.
Overcurrent Protection
The OCP function is enabled at start-up. When both
channels operate independently, the average function is
disabled and generates zero average current (I AVG = 0). The
Channel 2 current (I CS2 ) is compared with I TRIP (105μA)
and has its own independent overcurrent protection; while
the 7 clock cycles delay is bypassed. The Channel 1’s
current (I CS1 ) plus 15μA offset forms a voltage (V ISHARE )
with an external resistor R ISHARE and compares with a
VCC
where N is the number of phases; NCNTL is the number of
the ISL8120IRZEC controllers in parallel or multiphase
operations; I TRIP = 105μA; IOC is the load overcurrent trip
point; t MIN_OFF is the minimum Ugate turn off time that is
350ns; R ISHARE in Equation 6 represents the total
equivalent resistance in ISHARE pin bus of all ICs in
multiphase or module parallel operation.
The overcurrent trip current source is trimmed to 105μA
±10% for both channels, while the overcurrent threshold
(represented by V ISHARE ) for multiphase operation (or
Channel 1 depending upon configuration) is a precision 1.2V
±1% with 50mV hysteresis.
For the R ISEN chosen for OCP setting, the final value is
usually higher than the number calculated from Equation 6.
VSEN1/2- COM1/2
VSEN2-
COM1/2
VSEN1/2- COM1/2
ISET
ISL8120IRZEC 1
ISET
ISL8120IRZEC 2
VSEN1+
ISET
ISL8120IRZEC 3
R ISET1
ISHARE
R ISET2
ISHARE
VSEN1-
ISHARE
R ISET3
R ISHARE1
R ISHARE2
R ISHARE3
SHARE BUS
R ISHARE_ = R ISET_
FIGURE 15. SIMPLIFIED 6-PHASE SINGLE OUTPUT IMPLEMENTATION
27
FN6763.2
November 11, 2011
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| ISL8120IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8120IRZ-TEC | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8120IRZ-TK | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8121 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:3V to 20V, Two-Phase Buck PWM Controller with Integrated 4A MOSFET Drivers |
| ISL8121EVAL1 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:3V to 20V, Two-Phase Buck PWM Controller with Integrated 4A MOSFET Drivers |
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