- 您现在的位置：买卖IC网 > PDF目录17136 > KIT912F634EVME (Freescale Semiconductor)KIT EVAL FOR MM912F634 PDF资料下载
参数资料
| 型号： | KIT912F634EVME |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 123/339页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR MM912F634 |
| 标准包装： | 1 |
| 类型： | MCU |
| 适用于相关产品： | MM912F634 |
| 所含物品： | 板，线缆，CD |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页当前第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页第185页第186页第187页第188页第189页第190页第191页第192页第193页第194页第195页第196页第197页第198页第199页第200页第201页第202页第203页第204页第205页第206页第207页第208页第209页第210页第211页第212页第213页第214页第215页第216页第217页第218页第219页第220页第221页第222页第223页第224页第225页第226页第227页第228页第229页第230页第231页第232页第233页第234页第235页第236页第237页第238页第239页第240页第241页第242页第243页第244页第245页第246页第247页第248页第249页第250页第251页第252页第253页第254页第255页第256页第257页第258页第259页第260页第261页第262页第263页第264页第265页第266页第267页第268页第269页第270页第271页第272页第273页第274页第275页第276页第277页第278页第279页第280页第281页第282页第283页第284页第285页第286页第287页第288页第289页第290页第291页第292页第293页第294页第295页第296页第297页第298页第299页第300页第301页第302页第303页第304页第305页第306页第307页第308页第309页第310页第311页第312页第313页第314页第315页第316页第317页第318页第319页第320页第321页第322页第323页第324页第325页第326页第327页第328页第329页第330页第331页第332页第333页第334页第335页第336页第337页第338页第339页
Functional Description and Application Information
Background Debug Module (S12SBDMV1)
MM912F634
Freescale Semiconductor
209
NOTE
The ACK pulse does not provide a timeout. This means for the GO_UNTIL(169) command
that it can not be distinguished if a stop or wait has been executed (command discarded and
ACK not issued) or if the “UNTIL” condition (BDM active) is just not reached yet. Hence in
any case where the ACK pulse of a command is not issued the possible pending command
should be aborted before issuing a new command. See the handshake abort procedure
described in Section 4.30.4.8, “Hardware Handshake Abort Procedure"”.
The ACK handshake protocol does not support nested ACK pulses. If a BDM command is not acknowledge by an ACK pulse,
the host needs to abort the pending command first in order to be able to issue a new BDM command. When the CPU enters wait
or stop while the host issues a hardware command (e.g., WRITE_BYTE), the target discards the incoming command due to the
wait or stop being detected. Therefore, the command is not acknowledged by the target, which means that the ACK pulse will
not be issued in this case. After a certain time the host (not aware of stop or wait) should decide to abort any possible pending
ACK pulse in order to be sure a new command can be issued. Therefore, the protocol provides a mechanism in which a
command, and its corresponding ACK, can be aborted.
4.30.4.8
Hardware Handshake Abort Procedure
The abort procedure is based on the SYNC command. In order to abort a command, which has not issued the corresponding
ACK pulse, the host controller should generate a low pulse in the BKGD pin by driving it low for at least 128 serial clock cycles
and then driving it high for one serial clock cycle, providing a speedup pulse. By detecting this long low pulse in the BKGD pin,
the target executes the SYNC protocol, see Section 4.30.4.9, “SYNC — Request Timed Reference Pulse"”, and assumes that
the pending command and therefore the related ACK pulse, are being aborted. Therefore, after the SYNC protocol has been
completed the host is free to issue new BDM commands. For Firmware READ or WRITE commands it can not be guaranteed
that the pending command is aborted when issuing a SYNC before the corresponding ACK pulse. There is a short latency time
from the time the READ or WRITE access begins until it is finished and the corresponding ACK pulse is issued. The latency time
depends on the firmware READ or WRITE command that is issued and on the selected bus clock rate. When the SYNC command
starts during this latency time the READ or WRITE command will not be aborted, but the corresponding ACK pulse will be
aborted. A pending GO, TRACE1 or GO_UNTIL(169) command can not be aborted. Only the corresponding ACK pulse can be
aborted by the SYNC command.
NOTE
The details about the short abort pulse are being provided only as a reference for the reader
to better understand the BDM internal behavior. It is not recommended that this procedure
be used in a real application.
Although it is not recommended, the host could abort a pending BDM command by issuing a low pulse in the BKGD pin shorter
than 128 serial clock cycles, which will not be interpreted as the SYNC command. The ACK is actually aborted when a negative
edge is perceived by the target in the BKGD pin. The short abort pulse should have at least 4 clock cycles keeping the BKGD
pin low, in order to allow the negative edge to be detected by the target. In this case, the target will not execute the SYNC protocol
but the pending command will be aborted along with the ACK pulse. The potential problem with this abort procedure is when
there is a conflict between the ACK pulse and the short abort pulse. In this case, the target may not perceive the abort pulse. The
worst case is when the pending command is a read command (i.e., READ_BYTE). If the abort pulse is not perceived by the target
the host will attempt to send a new command after the abort pulse was issued, while the target expects the host to retrieve the
accessed memory byte. In this case, host and target will run out of synchronism. However, if the command to be aborted is not
a read command the short abort pulse could be used. After a command is aborted the target assumes the next negative edge,
after the abort pulse, is the first bit of a new BDM command.
Since the host knows the target serial clock frequency, the SYNC command (used to abort a command) does not need to consider
the lower possible target frequency. In this case, the host could issue a SYNC very close to the 128 serial clock cycles length.
Providing a small overhead on the pulse length in order to assure the SYNC pulse will not be misinterpreted by the target. See
相关PDF资料 |
PDF描述 |
|---|---|
| MRJ0800DD-A | C/A MRJ21/MRJ21 GBE STRT CMR 80M |
| VE-JWF-EZ | CONVERTER MOD DC/DC 72V 25W |
| EBC28DCMD-S288 | CONN EDGECARD 56POS .100 EXTEND |
| RS-4805DZ/H3 | CONV DC/DC 2W 18-72VIN +/-05VOUT |
| 38S801C | INDUCTOR 0.80UH 12.5A SMD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| KIT912H634EVME | 功能描述:开发板和工具包 - S08 / S12 DUAL LOW&HIDE SWITCH EVB RoHS:否 产品:Development Kits 工具用于评估:MC9S12G128 核心:S12 接口类型:CAN, LIN, RS-232, USB 工作电源电压:5 V 制造商:Freescale Semiconductor |
| KIT912J637EVME | 功能描述:电源管理IC开发工具 BATTERY SENSOR 912J637 RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| KIT912S812ECUEVM | 功能描述:电源管理IC开发工具 Single Cylinder S12XS E RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| Kit-916 | 制造商:ANDERSON POWER PRODUCTS 功能描述:KIT |
| Kit-917 | 制造商:ANDERSON POWER PRODUCTS 功能描述:KIT |
发布紧急采购，3分钟左右您将得到回复。