
Functional Description and Application Information
Real Time Interrupt (S12SRTIV1)
MM912F634
Freescale Semiconductor
258
4.34
Real Time Interrupt (S12SRTIV1)
4.34.1
Introduction
This section describes the functionality of the Real Time Interrupt module (RTI), a sub-block of the HCS12S core platform. The
RTI (free running real time interrupt) enables the user to generate a hardware interrupt at a fixed periodic rate. If RTI is enabled,
the interrupt will occur at the rate selected by the RTICTL and RTICNT register.
The RTI counter is clocked by the internal reference clock. At the end of the RTI timeout period the RTIF flag is set to one and a
new RTI timeout period starts immediately.
The RTI contains two asynchronous clock domains (one for the Modulus Down Counter/Prescaler and one for the register bank).
Information exchange between both clock domains is fully synchronized. Therefore modification of the RTI timeout period must
be done in appliance to the write protection rules.
4.34.2
Overview
A block diagram of the RTI is shown in
Figure 81Figure 81. Block Diagram
4.34.3
Features
The RTI includes these distinctive features:
Generate hardware interrupt at a fixed periodic rate
Software selectable RTI operation in WAIT and STOP mode
Software selectable RTI freeze during BDM active mode
4.34.4
Modes of Operation
Run Mode
If RTI functionality is required, the individual bits (RTIRT) of the associated rate select registers (RTICTL) have to be set
to a non-zero value. In addition, to generate RTI requests, the RTI must be enabled (RTIE bit set). The RTI counter is
stopped if all rate select bits in the RTICTL register are zero. Interrupt requests will be disabled if the corresponding bit
(RTIE) is cleared.
Wait mode
If the respective enable bit (RTISWAI) is cleared, the RTI will continue to run, else RTI will remain frozen.
Stop mode
If the respective enable bit (RTIRSTP) is set, the RTI will continue to run, else RTI will remain frozen.
4.34.5
External Signal Description
There are no external signals associated with this module.
Modulus Down Counter
Prescaler
RTICNT-Register
Int_Ref_Clock
RTIRT[1:0]
RTI request
RTIF
RTIE
(1, 16, 256)
(1,...., 256)
bus clock
.