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| 型号： | KSZ8864RMN-EVAL |
| 厂商： | Micrel Inc |
| 文件页数： | 23/111页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8864RMN |
| 标准包装： | 1 |
| 主要目的： | 接口，以太网控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8864RMN |
| 已供物品： | 板 |
| 相关产品： | 576-3787-ND - IC ETHERNET SW 4PORT 64QFN |
| 其它名称： | 576-3869 |
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Micrel, Inc.
KSZ8864RMN
April 2012
19
M9999-043012-1.5
Introduction
The KSZ8864RMN contains two 10/100 physical layer transceivers and four media access control (MAC) units with an
integrated Layer 2 managed switch. The device runs in multiple modes. They are two copper + two MAC MII, two copper
+ two MAC RMII, two copper + 1 MAC MII+ 1 MAC RMII and two copper + 1 MAC MII or 1 MAC RMII. Those are useful
for implementing multiple products in many applications.
The KSZ8864RMN has the flexibility to reside in a managed or unmanaged design. In a managed design, a host
processor has complete control of the KSZ8864RMN via the SPI bus, or partial control via the MDC/MDIO interface. An
unmanaged design is achieved through I/O strapping or EEPROM programming at system reset time.
On the media side, the KSZ8864RMN supports IEEE 802.3 10BASE-T, 100BASE-TX on all ports with Auto MDI/MDIX.
The KSZ8864RMN can be used as fully managed 4-port switch through two microprocessors by its two MII interface or
RMII interface for an advance management application.
Physical signal transmission and reception are enhanced through the use of patented analog circuitry with enhanced mix
signal technology that makes the design more efficient and allows for lower power consumption and smaller chip die size.
The major enhancement of the KSZ8864RMN is a small package with two configurable MII and RMII modes for two MAC
interfaces. The KSZ8864RMN supports more new features for host processor management, multiple kind of packets
filtering, tag as well as port based VLAN, rapid spanning tree support, IGMP snooping support, port mirroring support and
more flexible rate limiting and more functionality.
Functional Overview: Physical Layer Transceiver
100BASE-TX Transmit
The 100BASE-TX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ-to-NRZI
conversion, MLT3 encoding and transmission. The circuit starts with a parallel-to-serial conversion, which converts the MII
data from the MAC into a 125MHz serial bit stream. The data and control stream is then converted into 4B/5B coding
followed by a scrambler. The serialized data is further converted from NRZ-to-NRZI format, and then transmitted in MLT3
current output. The output current is set by an external 1% 12.4k resistor for the 1:1 transformer ratio. It has a typical
rise/fall time of 4ns and complies with the ANSI TP-PMD standard regarding amplitude balance, overshoot, and timing
jitter. The wave-shaped 10BASE-T output is also incorporated into the 100BASE-TX transmitter.
100BASE-TX Receive
The 100BASE-TX receiver function performs adaptive equalization, DC restoration, MLT3-to-NRZI conversion, data and
clock recovery, NRZI-to-NRZ conversion, de-scrambling, 4B/5B decoding, and serial-to-parallel conversion. The receiving
side starts with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted pair cable. Since
the amplitude loss and phase distortion is a function of the length of the cable, the equalizer has to adjust its
characteristics to optimize the performance. In this design, the variable equalizer will make an initial estimation based on
comparisons of incoming signal strength against some known cable characteristics, then tunes itself for optimization. This
is an ongoing process and can self-adjust against environmental changes such as temperature variations.
The equalized signal then goes through a DC restoration and data conversion block. The DC restoration circuit is used to
compensate for the effect of baseline wander and improve the dynamic range. The differential data conversion circuit
converts the MLT3 format back to NRZI. The slicing threshold is also adaptive.
The clock recovery circuit extracts the 125MHz clock from the edges of the NRZI signal. This recovered clock is then used
to convert the NRZI signal into the NRZ format. The signal is then sent through the de-scrambler followed by the 4B/5B
decoder. Finally, the NRZ serial data is converted to the MII format and provided as the input data to the MAC.
PLL Clock Synthesizer
The KSZ8864RMN generates 125MHz, 83MHz, 41MHz, 25MHz and 10MHz clocks for system timing. Internal clocks are
generated from an external 25MHz crystal or oscillator.
Scrambler/De-Scrambler (100BASE-TX only)
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline wander.
The data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). This can generate a 2047-
bit non-repetitive sequence. The receiver will then de-scramble the incoming data stream with the same sequence at the
transmitter.
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相关代理商/技术参数 |
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| KSZ8864RMNI | 功能描述:以太网 IC 4-Port 10/100 Ethernet Switch w/ 2x PHYs and 2x MAC Interface - Industrial Temp RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8864RMNU | 功能描述:以太网 IC 4-Port 10/100BT Switch with MII/RMII (Automotive) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8864RMNU TR | 制造商:Micrel Inc 功能描述:IC ETHERNET SWITCH 4PORT 64MLF |
| KSZ8873FLL | 功能描述:以太网 IC 3-Port Fast Ethernet Switch with 2x FX Ports - Lead free RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8873FLL-EVAL | 功能描述:以太网开发工具 3-Port Fast Ethernet Switch with 2x FX Ports - Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
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