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参数资料
型号： KSZ8864RMN-EVAL
厂商： Micrel Inc
文件页数： 63/111页
文件大小： 0K
描述： BOARD EVALUATION FOR KSZ8864RMN
标准包装： 1
主要目的： 接口，以太网控制器（PHY 和 MAC）
嵌入式： 否
已用 IC / 零件： KSZ8864RMN
已供物品： 板
相关产品： 576-3787-ND - IC ETHERNET SW 4PORT 64QFN
其它名称： 576-3869
1997 Microchip Technology Inc.
DS30444E - page 55
PIC16C9XX
9.0
TIMER2 MODULE
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
the PWM mode of the CCP module. The TMR2 register
is readable and writable, and is cleared on any device
reset.
The input clock (FOSC/4) has a prescale option of 1:1,
1:4
or
1:16
(selected
by
control
bits
T2CKPS1:T2CKPS0 (T2CON<1:0>)).
The Timer2 module has an 8-bit period register, PR2.
TMR2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is set
during RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in ag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Figure 9-2 shows the Timer2 control register.
9.1
Timer2 Prescaler and Postscaler
The prescaler and postscaler counters are cleared
when any of the following occurs:
a write to the TMR2 register
a write to the T2CON register
any device reset (Power-on Reset, MCLR Reset,
or Watchdog Timer Reset)
TMR2 will not clear when T2CON is written.
9.2
Output of TMR2
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module which optionally uses
it to generate shift clock.
FIGURE 9-1:
TIMER2 BLOCK DIAGRAM
Comparator
TMR2
Sets ag
TMR2 reg
output (1)
Reset
Postscaler
Prescaler
PR2 reg
2
Fosc/4
1:1
1:16
1:1, 1:4, 1:16
EQ
4
bit TMR2IF
Note
1: TMR2 register output can be software selected
by the SSP Module as the source clock.
to
FIGURE 9-2:
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
U-0
R/W-0
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON
T2CKPS1 T2CKPS0
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
Unimplemented: Read as '0'
bit 6-3:
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000
= 1:1 Postscale
0001
= 1:2 Postscale
1111
= 1:16 Postscale
bit 2:
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
bit 1-0:
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00
= Prescaler is 1
01
= Prescaler is 4
1x
= Prescaler is 16
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