参数资料
型号: KSZ8864RMN-EVAL
厂商: Micrel Inc
文件页数: 34/111页
文件大小: 0K
描述: BOARD EVALUATION FOR KSZ8864RMN
标准包装: 1
主要目的: 接口,以太网控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8864RMN
已供物品:
相关产品: 576-3787-ND - IC ETHERNET SW 4PORT 64QFN
其它名称: 576-3869
1997 Microchip Technology Inc.
DS30444E - page 29
PIC16C9XX
4.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any reset, the upper bits of the PC
will be cleared. Figure 4-9 shows the two situations for
the loading of the PC. The upper example in the gure
shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
→ PCH). The lower example in the g-
ure shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-9:
LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note
“Implementing a Table Read” (AN556).
4.3.2
STACK
The PIC16CXXX family has an 8 level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is
not readable or writable. The PC is PUSHed onto the
stack when a CALL instruction is executed or an inter-
rupt causes a branch. The stack is POPed in the event
of a RETURN, RETLW or a RETFIE instruction execu-
tion. PCLATH is not affected by a PUSH or POP oper-
ation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the rst
push. The tenth push overwrites the second push (and
so on).
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU result
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
8
7
2
PCLATH
PCH
PCL
PCL as
Destination
4.4
Program Memory Paging
PIC16C9XX devices are capable of addressing a con-
tinuous 8K word block of program memory. The CALL
and GOTO instructions provide only 11 bits of address
to allow branching within any 2K program memory
page. When doing a CALL or GOTO instruction the
upper 2 bits of the address are provided by
PCLATH<4:3>. When doing a CALL or GOTO instruc-
tion, the user must ensure that the page select bits are
programmed so that the desired program memory
page is addressed. If a return from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is pushed
onto
the
stack. Therefore,
manipulation
of
the
PCLATH<4:3> bits are not required for the return
instructions (which POPs the address from the stack).
Note 1: There are no status bits to indicate stack
overow or stack underow conditions.
Note 2: There are no instructions/mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL,
RETURN,
RETLW,
and RETFIE
instructions, or the vectoring to an inter-
rupt address.
Note:
The
PIC16C9XX
ignores
paging
bit
PCLATH<4>, which is used to access pro-
gram memory pages 2 and 3. The use of
PCLATH<4>
as
a
general
purpose
read/write bit is not recommended since
this may affect upward compatibility with
future products.
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