参数资料
型号: LTC1735CGN-1#TRPBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-SSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 335kHz
占空比: 99.4%
电源电压: 3.5 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LTC1735-1
APPLICATIO S I FOR ATIO
Significant efficiency gains can be realized by powering
INTV CC from the output, since the V IN current resulting
from the driver and control currents will be scaled by a
V OSENSE
V OUT
R2
factor of (Duty Cycle)/(Efficiency). For 5V regulators this
simply means connecting the EXTV CC pin directly to V OUT .
However, for dynamic (VID-like) programmed regulators
LTC1735-1
SGND
1735-1 F03
47pF
R1
V OUT = 0 . 8 V ? 1 +
?
and other lower voltage regulators, additional circuitry is
required to derive INTV CC power from the output.
The following list summarizes the four possible connec-
tions for EXTV CC:
1. EXTV CC Left Open (or Grounded). This will cause INTV CC
to be powered from the internal 5.2V regulator resulting
in an efficiency penalty of up to 10% at high input
voltages.
2. EXTV CC connected directly to V OUT . This is the normal
connection for a 5V to 7V output regulator and provides
the highest efficiency. For output voltages > 5V, EXTV CC
is required to connect to V OUT so the SENSE pins
absolute maximum ratings are not exceeded.
3. EXTV CC Connected to an External Supply (This Option
is the Most Likely Used). If an external supply is
available in the 5V to 7V range, such as notebook main
5V system power, it may be used to power EXTV CC
providing it is compatible with the MOSFET gate drive
requirements. This is the typical case as the 5V power
is almost always present and is derived by another high
efficiency regulator.
4. EXTV CC Connected to an Output-Derived Boost Net-
work. For low output voltage regulators, efficiency
gains can still be realized by connecting EXTV CC to an
output-derived voltage that has been boosted to greater
than 4.7V. This can be done with either the inductive
boost winding or capacitive charge pump circuits.
Refer to the LTC1735 data sheet for details. The charge
pump has the advantage of simple magnetics.
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following formula:
? R 2 ?
? R 1 ?
Figure 3. Setting the LTC1735-1 Output Voltage
The resistive divider is connected to the output as shown
in Figure 3 allowing remote voltage sensing.
The output voltage can be digitally set to voltages between
any two levels with the addition of a resistor and small
signal N-channel MOSFET as shown in the circuit of
Figure 1. Dynamic output voltage selection can be accom-
plished with this technique. Output voltages of 1.30V and
1.55V are set by the resistors R1 to R3. With the gate of
the MOSFET low, (V G = 0), the output voltage is set by the
ratio of R1 to R2. When the MOSFET is on (V G = high), the
output voltage is the ratio of R1 to the parallel combina-
tion of R2 and R3. With the available power good output
(PGOOD), the circuit in Figure 1 creates a low cost Intel
Pentium III mobile processor compliant supply.
The LTC1735-1 has remote sense capability. The top of the
internal resistive divider is connected to V OSENSE and is
referenced to the SGND pin. This allows a kelvin connec-
tion for remotely sensing the output voltage directly across
the load, eliminating any PC board trace resistance errors.
Topside MOSFET Driver Supply (C B , D B )
An external bootstrap capacitor C B connected to the BOOST
pin supplies the gate drive voltage for the topside
MOSFET. Capacitor C B in the Functional Diagram is charged
though external diode D B from INTV CC when the SW pin is
low. Note that the voltage across C B is about a diode drop
below INTV CC . When the topside MOSFET is to be turned
on, the driver places the C B voltage across the gate-source
of the MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage SW rises to
V IN and the BOOST pin rises to V IN + INTV CC . The value of
the boost capacitor C B needs to be 100 times greater than
the total input capacitance of the topside MOSFET. In most
applications 0.1 μ F to 0.33 μ F is adequate. The reverse
breakdown on D B must be greater than V IN(MAX) .
15
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