参数资料
型号: LTC3838EUHF#TRPBF
厂商: Linear Technology
文件页数: 12/54页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 2MHz
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 38-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3838
PIN FUNCTIONS
(QFN/TSSOP)
SW1, SW2 (Pins 21, 30/Pins 25, 34): Switch Node Con-
nection to Inductors. Voltage swings are from a diode
voltage below ground to V IN . The (–) terminal of the
bootstrap capacitor, C B , connects to this node.
BG1, BG2 (Pins 22, 29/Pins 26, 33): Bottom Gate
Driver Outputs. The BG pins drive the gates of the bottom
N-channel power MOSFET between PGND and DRV CC .
DRV CC1 , DRV CC2 (Pins 23, 28/Pins 27, 32): Supplies of
Bottom Gate Drivers. DRV CC1 is also the output of an internal
5.3V regulator. DRV CC2 is also the output of the EXTV CC
switch. Normally the two DRV CC pins are shorted together
on the PCB, and decoupled to PGND with a minimum of
4.7μF ceramic capacitor, C DRVCC .
V IN (Pin 24/Pin 28): Input Voltage Supply. The supply
voltage can range from 4.5V to 38V. For increased noise
immunity decouple this pin to SGND with an RC filter.
Voltage at this pin is also used to adjust top gate on-time,
therefore it is recommended to tie this pin to the main
power input supply through an RC filter.
PGND (Pin 25, Exposed Pad Pin 39/Pin 29, Exposed
Pad Pin 39): Power Ground. Connect this pin as close
as practical to the source of the bottom N-channel power
INTV CC (Pin 26/Pin 30): Supply Input for Internal Circuitry
(Not Including Gate Drivers). Normally powered from the
DRV CC pins through a decoupling RC filter to SGND (typi-
cally 2Ω and 1μF).
EXTV CC (Pin 27/Pin 31): External Power Input. When
EXTV CC exceeds the switchover voltage (typically 4.6V),
an internal switch connects this pin to DRV CC2 and shuts
down the internal regulator so that INTV CC and gate driv-
ers draw power from EXTV CC . The V IN pin still needs to
be powered up but draws minimum current.
V FB2 (Pin 38/Pin 4): Error Amplifier Feedback Input for
Channel 2. This pin connects the error amplifier to an
external feedback resistor divider from V OUT2 . In nominal
operation the LTC3838 will attempt to regulate the V OUT2
to 0.6V divided by the feedback resistor divider ratio.
Shorting this pin to INTV CC will disable Channel 2’s er-
ror amplifier, and internally connect ITH2 to ITH1. (As a
result, TRACK/SS2 is no longer functional and PGOOD2
is always pulling low.) By doing so, this part can function
as a dual phase, single V OUT step-down controller, and
the two channels use a single Channel?1’s error amplifier
for the ITH output and compensation.
MOSFET, the (–) terminal of C DRVCC and the (–) terminal
of C IN . Connect the exposed pad and PGND pin to SGND
pin using a single PCB trace under the IC. The exposed
pad must be soldered to the circuit board for electrical
and rated thermal performance.
3838fa
12
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