- 您现在的位置：买卖IC网 > PDF目录369885 > LXT350PE PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC PDF资料下载
参数资料
| 型号： | LXT350PE |
| 英文描述： | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| 中文描述： | 的PCM收发器|单|优税PCM-30/E-1 |的CMOS | LDCC | 28脚|塑料 |
| 文件页数： | 31/50页 |
| 文件大小： | 1197K |
| 代理商： | LXT350PE |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页当前第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
—
LXT350
Datasheet
31
5
CDFMO
1 = Clear/Mask Driver Failure Monitor Open interrupt.
0 = Enable Driver Failure Monitor Open interrupt.
6
CESO
1 = Clear/Mask Elastic Store Overflow interrupt.
0 = Enable Elastic Store Overflow interrupt.
7
CESU
1 = Clear/Mask Elastic Store Underflow interrupt.
0 = Enable Elastic Store Underflow interrupt.
Table 14. Transition Status Register
Read Only, Address (A7-A0) = x010100x
Bit
Name
Function
0
TLOS
1 = Loss of Signal (LOS) has changed since last clear LOS interrupt occurred.
0 = No change in status.
1
-
Reserved. Ignore.
2
TAIS
1 = AIS has changed since last clear AIS interrupt occurred.
0 = No change in status.
3
TQRSS
1 = QRSS has changed since last clear QRSS interrupt occurred
1
.
0 = No change in status.
4
-
Reserved. Ignore.
5
TDFMO
1 = DFMO has changed since last clear DFMS interrupt occurred.
0 = No change in status.
6
ESOVR
1 = ES overflow status sticky bit
2
.
0 = No change in status.
7
ESUNF
1 = ES underflow status sticky bit
2
.
0 = No change in status.
1. A QRSS transition indicates receive QRSS pattern sync or loss. A simple error in QRSS pattern is not reported as a
transition.
2. Tripping the overflow or underflow indicator in the ES sets the ESOVR/ESUNF status bit(s). Reading the Transition Status
Register clears these bits. Setting CESO and CESU in the Interrupt Clear Register masks these interrupts.
Table 15. Performance Status Register
Read Only, Address (A7-A0) = x010101x
Bit
Name
Function
0
LOS
1 = Loss of Signal occurred.
0 = Loss of Signal did not occur.
1
-
Reserved. Ignore.
2
AIS
1 = Alarm Indicator Signal detected.
0 = Alarm Indicator Signal not detected.
3
QRSS
1 = Quasi-Random Signal Source pattern detected.
0 = Quasi-Random Signal Source pattern not detected.
4
-
Reserved. Ignore.
Table 13. Interrupt Clear Register
Read/Write, Address (A7-A0) = x010011x
Bit
Name
Function
1
1. Leaving a 1 of in any of these bits masks the associated interrupt.
相关PDF资料 |
PDF描述 |
|---|---|
| LXT361LE | Telecommunication IC |
| LXT361PE | Telecommunication IC |
| LXT362LE | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC |
| LXT362PE | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|LDCC|28PIN|PLASTIC |
| LXT362QE | PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|QFP|44PIN|PLASTIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LXT350QE | 制造商:LEVEL1 功能描述: |
| LXT351 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation |
| LXT351PE | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| LXT351QE | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| LXT360 | 制造商:LVL1 制造商全称:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
发布紧急采购，3分钟左右您将得到回复。