参数资料
型号: M306V8FJFP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP116
封装: 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件页数: 31/77页
文件大小: 2650K
代理商: M306V8FJFP
M306V8FJFP
Rev.1.31
Apr 18, 2005
page 35 of 363
REJ03B0082-0131
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Table 4.6. Operation of RD, WR and BHE Signals
Status of external data bus
RD
BHE
WR
HL
L
LHL
HLH
LH
H
Write 1 byte of data to an odd address
Read 1 byte of data from an odd address
Write 1 byte of data to an even address
Read 1 byte of data from an even address
Data bus width
A0
H
L
HL
L
LHL
L
Write data to both even and odd addresses
Read data from both even and odd addresses
16-bit
(BYTE pin input
= “L”)
Status of external data bus
Read data
Write 1 byte of data to an even address
Write 1 byte of data to an odd address
Write data to both even and odd addresses
WRH
WRL
RD
Data bus width
16-bit
( BYTE pin input
= “L”)
H
L
H
L
H
L
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Table 4.5. Operation of RD, WRL and WRH Signals
(4) Read and Write Signals
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When the data bus is 16 bits wide, the read and write signals can be chosen to be a combination of RD,
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BHE and WR or a combination of RD, WRL and WRH by using the PM02 bit in the PM0 register. When
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the data bus is 8 bits wide, use a combination of RD, WR and BHE.
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Table 4.5 shows the operation of RD, WRL, and WRH signals. Table 4.6 shows the operation of operation
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of RD, WR, and BHE signals.
(5) ALE Signal
The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the
ALE signal falls.
ALE
Address
Data
Address
A1/D0 to A8/D7
A9 to A19
Address
A0
Note : If the entire CS space is assigned a multiplexed bus, these pins function as I/O ports.
Figure 4.6. ALE Signal, Address Bus, Data Bus
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