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参数资料
| 型号： | M306V8FJFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP116 |
| 封装： | 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116 |
| 文件页数： | 50/77页 |
| 文件大小： | 2650K |
| 代理商： | M306V8FJFP |
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M306V8FJFP
Rev.1.31
Apr 18, 2005
page 52 of 363
REJ03B0082-0131
System clock control register 0 (Note 1)
Symbol
Address
After reset
CM0
000616
010010002
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
0 0 : I/O port P57
0 1 : fC output
1 0 : f8 output
1 1 : f32 output
b1 b0
CM07
CM05
CM04
CM03
CM01
CM02
CM00
CM06
Clock output function
select bit
(Valid only in single-chip
mode)
WAIT peripheral function
clock stop bit
0 : Do not stop peripheral function clock in wait mode
1 : Stop peripheral function clock in wait mode (Note 8)
XCIN-XCOUT drive capacity
select bit (Note 2)
0 : LOW
1 : HIGH
Port XC select bit
0 : I/O port P86, P87
1 : XCIN-XCOUT generation function(Note 9)
Main clock stop bit
(Notes 3, 11, 12)
0 : On
1 : Off (Note 4, Note5)
Main clock division select
bit 0 (Notes 7, 11)
0 : CM16 and CM17 valid
1 : Division by 8 mode
System clock select bit
(Notes 6, 10)
0 : Main clock
1 : Sub-clock
Note 1: Write to this register after setting the PRC0 bit of PRCR register to “1” (write enable).
Note 2: The CM03 bit is set to “1” (high) when the CM04 bit is set to “0” (I/O port) or the microcomputer goes to a stop mode.
Note 3: This bit is provided to stop the main clock when the low power dissipation mode is selected.
This bit cannot be used for detection as to whether the main clock stopped or not. To stop the main clock, the following setting
is required:
(1) Set the CM07 bit to “1” (Sub-clock select) with the sub-clock stably oscillating.
(2) Set the CM05 bit to “1” (Stop).
Note 4: During external clock input, only the clock oscillation buffer is turned off and clock input is accepted if the sub clock is not
chosen as a CPU clock.
Note 5: When CM05 bit is set to “1, the XOUT pin goes “H”. Furthermore, because the internal feedback resistor remains connected,
the XIN pin is pulled “H” to the same level as XOUT via the feedback resistor.
Note 6: After setting the CM04 bit to “1” (XCIN-XCOUT oscillator function), wait until the sub-clock oscillates stably before switching
the CM07 bit from “0” to “1” (sub-clock).
Note 7: When entering stop mode from high or middle speed mode, the CM06 bit is set to “1” (divide-by-8 mode).
Note 8: The fC32 clock does not stop. During low speed or low power dissipation mode, do not set this bit to “1” (peripheral clock
turned off when in wait mode).
Note 9: To use a sub-clock, set this bit to “1”. Also make sure ports P86 and P87 are directed for input, with no pull-ups.
Note 10: To use the main clock as the clock source for the CPU clock, follow the procedure below.
(1) Set the CM05 bit to “0” (oscillate).
(2) Wait until td(M-L) elapses or the main clock oscillation stabilizes, whichever is longer.
(3) Set the CM07 bit to “0”.
Note 11: When the CM05 bit = 1 (main clock turned off), the CM06 bit is fixed to “1”
(divide-by-8 mode) and the CM15 bit is fixed to “1” (drive capability High). Please do not change bits CM06, CM17 to CM16 in
low power consumption mode.
RW
(Note 2)
RW
Figure 5.2. CM0 Register
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