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参数资料
| 型号： | M306V8FJFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP116 |
| 封装： | 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116 |
| 文件页数： | 59/77页 |
| 文件大小： | 2650K |
| 代理商： | M306V8FJFP |
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M306V8FJFP
Rev.1.31
Apr 18, 2005
page 60 of 363
REJ03B0082-0131
Power Control
There are three power control modes. For convenience’ sake, all modes other than wait and stop modes
are referred to as normal operation mode here.
(1) Normal Operation Mode
Normal operation mode is further classified into four modes.
In normal operation mode, because the CPU clock and the peripheral function clocks both are on, the
CPU and the peripheral functions are operating. Power control is exercised by controlling the CPU clock
frequency. The higher the CPU clock frequency, the greater the processing capability. The lower the CPU
clock frequency, the smaller the power consumption in the chip. If the unnecessary oscillator circuits are
turned off, the power consumption is further reduced.
Before the clock sources for the CPU clock can be switched over, the new clock source to which switched
must be oscillating stably. If the new clock source is the main clock or sub clock, allow a sufficient wait
time in a program until it becomes oscillating stably.
High-speed Mode
The main clock divided by 1 provides the CPU clock. If the sub clock is on, fC32 can be used as the
count source for timers A and B.
Medium-speed Mode
The main clock divided by 2, 4, 8 or 16 provides the CPU clock. If the sub clock is on, fC32 can be used
as the count source for timers A and B.
Low-speed Mode
The sub clock provides the CPU clock.
The fC32 clock can be used as the count source for timers A and B.
Low Power Dissipation Mode
In this mode, the main clock is turned off after being placed in low speed mode. The sub clock provides
the CPU clock. The fC32 clock can be used as the count source for timers A and B.
Simultaneously when this mode is selected, the CM06 bit of CM0 register becomes “1” (divided by 8
mode). In the low power dissipation mode, do not change the CM06 bit. Consequently, the medium
speed (divided by 8) mode is to be selected when the main clock is operated next.
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