参数资料
型号: M38D59GF-XXXFP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PQFP80
封装: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件页数: 30/142页
文件大小: 2004K
代理商: M38D59GF-XXXFP
Rev.3.04
May 20, 2008
Page 125 of 134
REJ03B0158-0304
38D5 Group
Notes on Interrupts
1. Changing Related Register Settings
If the interrupt occurrence synchronized with the following
settings is not required, take the sequence shown below.
When selecting the external interrupt active edge
When selecting the interrupt source of the interrupt vector
address where two or more interrupt sources are allocated
Fig. 102 Sequence for setting related register
<Reason>
In the following cases, the interrupt request bit of the
corresponding interrupt may be set to “1”.
<When switching the external interrupt active edge>
INT0 interrupt edge selection bit
(bit 0 of interrupt edge selection register (address 003A16))
INT1 interrupt edge selection bit
(bit 1 of interrupt edge selection register)
INT2 interrupt edge selection bit
(bit 2 of interrupt edge selection register)
CNTR0 active edge switch bits
(bits 6 and 7 of timer X control register 1 (address 002E16))
CNTR1 active edge switch bit
(bits 6 of timer Y mode register (address 003816))
<When switching the interrupt source of the interrupt vector
address where two or more interrupt sources are allocated>
Timer Y/CNTR1 interrupt switch bit
(bit 3 of interrupt edge selection register)
<When switching the INT pin>
INT0 input port switch bit
(bit 4 of interrupt edge selection register)
INT1 input port switch bit
(bit 5 of interrupt edge select register)
2. Checking Interrupt Request Bit
To check the interrupt request bit with the BBC or BBS
instruction immediately after this bit is set to “0”, take the
following sequence.
<Reason>
If the BBC or BBS instruction is executed immediately after the
interrupt request bit is set to “0”, the bit value before being set to
“0” is read.
Fig. 103 Sequence for setting interrupt request bit
3. Setting Unused Interrupts
Set the interrupt enable bit of the unused interrupt to “0”
(disabled).
Set the interrupt edge selection bit (active edge
switch bit) or interrupt (source) selection bit.
NOP (one or more instructions)
Set the corresponding interrupt enable bit to
“0” (disabled).
Set the corresponding interrupt request bit to “0”
(no interrupt request).
Set the corresponding interrupt enable bit to “1”
(enabled).
NOP (one or more instructions)
Set the interrupt request bit to “0” (no interrupt)
Execute the BBC or BBS instruction
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