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参数资料
| 型号： | M65818AFP |
| 厂商： | Renesas Technology Corp. |
| 英文描述： | Digital Amplifier Processor of S-Master Technology |
| 中文描述： | 数字放大器处理器的S - Master技术 |
| 文件页数： | 20/39页 |
| 文件大小： | 384K |
| 代理商： | M65818AFP |
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M65818AFP
Rev.1.00, Sep.04.2003, page 20 of 38
The examples of a connection diagram
The case of the single use (2ch) in each input mode are shown in the following figure.
Normal Mode
External 8fs Data Mode (The Case of Primary Side Synchronization)
External 8fs Data Mode (The case of secondary side synchronization)
SACD-fsi Mode
SACD-fso Mode
LRCK
FsoI
FsiI
EXWCK
LRCK
FsiI
EXWCK
LRCK
FsoI
FsiI
EXWCK
FsoCKO
LRCK
FsoI
FsiI
EXWCK
EXWCK (Secondary)
LRCK
FsoI
FsiI
EXWCK
FsoCKO
DSDCKIO=L
ASYNCEN1=enable
ASYNCEN2=enable
LRCK
FsoI
FsiI
EXWCK
DSDCKIO=H
ASYNCEN1=disable
ASYNCEN2=disable
FsoCKO
ASYNCEN1=don't care
ASYNCEN2=enable
LRCK
FsoI
FsiI
EXWCK
ASYNCEN1=don't care
ASYNCEN2=disable
ASYNCEN1=don't care
ASYNCEN2=enable
LRCK
FsoI
FsiI
EXWCK
ASYNCEN1=don't care
ASYNCEN2=disable
ASYNCEN1=don't care
ASYNCEN2=enable
FsoI
FsoCKO
DSDCKIO=L
ASYNCEN1=don't care
ASYNCEN2=enable
LRCK
FsiI
EXWCK
DSDCKIO=H
ASYNCEN1=don't care
ASYNCEN2=disable
FsoI
LRCK (Primary)
LRCK (Primary)
EXWCK (Primary)
EXWCK (Primary)
FsoCKO
(Secondary)
FsiI (Primary)
DSD128Fs/64Fs
(Primary)
DSD128Fs/64Fs
(Primary)
DSD128Fs/64Fs
(Secondary)
DSD128Fs/64Fs
(Secondary)
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