M65818AFP
Rev.1.00, Sep.04.2003, page 30 of 38
"Enable" of Primary Side Asynchronous Detection Flag (bi16: ASYNCEN1).
Bit16 controls "enable"/"disable" of primary-side-asynchronous-detection-circuit.
ASYNCEN1 :
"L"…disable.
"H"…enable.
Under condition of ASYNCEN1 ="L", primary side asynchronous detection is unavailable whether the clock is not
inputted to
FsiI
pin, thereby M65818AFP does not operate function under asynchronization, for instance mute
operation. However, Primary Side Asynchronous Detection is available only condition of `SACD-Fsi` mode.
Selection of Muting operation at primary Side Asynchronous Detection (bit20:ASYNC1MODE)
"L" …Duty 50% Mute of PWM output at primary side asynchronous detection.
"H"… Input Zero Mute of the gain control at primary side asynchronous detection.
(PWM Output 50% Mute doesn't be operated in this setting.)
Selection of Data Input Mode for external 8fs.(bit21: EXMODE)
"L"…A setup in case an external 8fs data input is secondary side synchronous.
(Data is inputted to Gain Control Block)
"H"…A setup in case an external 8fs data input is primary side synchronous.
(Data is inputted to Sampling Rate Converter Block)
Selection of PWM output form (bit22, 23:PWMMODE 0 and 1)
5.
The selection of PWM output form 1, 2, 3, and 4 , refer to Chapter 5-12 for the details.
Refer to Table 6-2-
*NOTE1 : At the setting of PWM Output Form2
PWM Output Form2 enable to operate the following conditions.
bit17 NSOBIT) "H" (5bit), bit16(NSSPEED)="L"(16 fso)
Only in terminal
MCKSEL
="L" (secondary side master clock 1024 fso)
In the case of setting and release for PWM Output Form2, set both flags as follows.
Serial Control System1 Mode, bit 22, 23 (PWMMODE0,1 )
Serial Control System2 Mode: bit16 (NSSPEED), bit17 (NSOBIT)
<The case of the setting for PWM output form2>
(1) Set to Serial Control System2 mode : bit17(NSOBIT)="H"
bit16(NSSPEED )="L".
(To be set as MCKSEL="L" in advance is required.)
(2) Serial control System1 mode:bit22, 23(PWMMODE0,1)="H","L"
When a setup of both (1) and (2) is completed, it changes to Form2. When (2) is set up before (1), The term until
a setup of (1) holds the last PWM Output Form.
<The case of release for PWM output form2>
(1) Serial control System1 mode:bit22, bit 23 (PWMMODE 0 , 1) is set as the Form to be used.
(2) Serial Control System2 mode:bit17(NSOBIT),bit16(NSSPEED) is set the condition to be used.
When a setup of (1) is completed, PWM Output Form changes. When (2) is set up before (1), a term until a
setup of (1) is worked keeps the Form 2 in the state of serial control System2 mode:bit17(NSOBIT) ="H",
bit16(NSSPEED) ="L".