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参数资料
| 型号： | M66592WG |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA64 |
| 封装： | 0.80 MM PITCH, FBGA-64 |
| 文件页数： | 2/40页 |
| 文件大小： | 1583K |
| 代理商： | M66592WG |
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M66592F P/W G
Rev 1.00 2004.10.01 page 10 of 125
1.7 An overview of functions
1.7.1
Bus interfaces
The controller supports the bus interfaces noted below.
1.7.1.1 External bus interface
The controller uses a CPU bus interface to access control registers.
The bus interface with the CPU supports the two access methods noted below. The Chip Select pin (CS_N) and the
three strobe pins (RD_N, WR0_N and WR1_N) should be used for access.
(1) (16-bit separate bus
The six address buses (A6-1) and the 16 data buses (D15-0) are used.
(2) 16-bit multiplex bus
The ALE pin (ALE) and the 16 data buses (D15-0) are used. The data buses are used for addresses and data on
a time-shared basis.
The separate bus and multiplex bus are selected based on the MPBUS pin signal level when the H/W reset is
canceled.
1.7.1.2 Accessing the buffer memory
The controller supports the two methods described below to access the USB data transfer buffer memory.
(1) CPU access
Addresses and control signals should be used to write data to the buffer memory or read it from the buffer
memory.
(2) DMA access
Data should be written to the buffer memory of the controller, or read from the buffer memory, from the DMAC
in the CPU or a dedicated DMAC.
USB data communication is done using Little Endian. There is a byte Endian swap function for FIFO port access,
and when using 16-bit access, the Endian can be switched using the register settings.
1.7.1.3 DMA access methods
When using DMA access to access the buffer memory, the two access methods noted below can be selected.
(1) Method using a bus shared with the CPU
(2) Method using a dedicated bus (split bus)
1.7.2
USB events
The controller notifies the user’s system of USB operation events by means of interrupts. Moreover, with a pipe for
which the DMA interface has been selected, the system is notified that the buffer memory of the controller can be
accessed by asserting the DREQ signal.
There are eight types of interrupts and 35 causes for interrupts being generated. The user can select whether or not
interrupt notification is permitted for each type and each cause, using settings in the control program for the user
system.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M66592WG#RB0Z | 制造商:Renesas Electronics Corporation 功能描述:USB 2 Peripheral Controller 64-Pin FBGA 制造商:Renesas 功能描述:USB 2 Peripheral Controller 64-Pin FBGA |
| M66596FP | 制造商:Renesas Electronics Corporation 功能描述:USB CONTROLLERS |
| M66596FP#RB0Z | 制造商:Renesas Electronics Corporation 功能描述:MCU - Trays 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Cut Tape 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Tray 制造商:Renesas 功能描述:USB Device Controller 64-Pin LQFP |
| M66596FPRB0Z | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Dual Function Controller,LQFP64 |
| M66596WG | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:ASSP (USB2.0 Dual Function Controller) |
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