参数资料
型号: M66592WG
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封装: 0.80 MM PITCH, FBGA-64
文件页数: 25/40页
文件大小: 1583K
代理商: M66592WG
M66592F P/W G
Rev 1.00 2004.10.01 page 31 of 125
Interrupt enabled register 1[INTENB1]
<Address: 32H>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BRDYM INTL
PCSE
?
0
-
0
-
0
-
Bit
Name
Function
S/W
H/W
Note
15-3 Nothing is placed here. These should be fixed at “0”.
2
BRDYM
BRDY interrupt status clear timing control
0: Software clears BRDY interrupt status
1: The controller clears BRDY interrupt status
R/W
R
3.2.2
*1)
1
INTL
Interrupt output sensing control
0: Edge sensing
1: Level sensing
R/W
R
3.2.1
0
PCSE
returning fact selection from low-power
sleep mode
0: USB resume detectionm, VBUS interrupt
detection during suspend, or CS_N signal
input
1: USB resume detectionm, or VBUS interrupt
detection during suspend
R/W
R
3.2.5
*2)
Note
*1)
When software sets "BRDYM=1", it will set “INTL=1” also.
*2) PCSE bit shoud be set after “USBE=1” setting.
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