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参数资料
| 型号： | MAX11008BETM+ |
| 厂商： | Maxim Integrated |
| 文件页数： | 20/67页 |
| 文件大小： | 0K |
| 描述： | IC CTLR LDMOS BIAS DUAL 48TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 43 |
| 功能： | 偏压控制器 |
| RF 型： | 手机 |
| 次要属性： | 片上 4Kb EEPROM |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 包装： | 托盘 |
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Dual RF LDMOS Bias Controller with
Nonvolatile Memory
A master device communicates to the MAX11008 by
transmitting the proper slave address followed by a
command and/or data words. Each transmit sequence
is framed by a START (S) or repeated START (Sr) con-
dition and a STOP (P) condition. Each word transmitted
over the bus is 8 bits long and is always followed by an
acknowledge clock pulse.
The MAX11008 SDA and SCL drivers are open-drain
outputs, requiring a pullup resistor (750 ? or greater) to
generate a logic-high voltage (see the Typical
Application Circuits). Series resistors are optional for
noise filtering. These series resistors protect the input
stages of the MAX11008 from high-voltage spikes on
the bus line, and minimize crosstalk and undershoot of
the bus signals.
Bit Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see the START
and STOP Conditions section). Both SDA and SCL idle
high when the I 2 C bus is not busy.
START and STOP Conditions
The master initiates a transmission with a START condi-
tion (S), which is a high-to-low transition on SDA while
SCL is high. The master terminates a transmission with
a STOP condition (P), which is a low-to-high transition
on SDA while SCL is high (see Figure 5). A repeated
START condition (Sr) can be used in place of a STOP
condition to leave the bus active and the mode
unchanged (see the HS I 2 C Mode section).
Acknowledge Bits and Not-Acknowledge Conditions
Data transfers are framed with an acknowledge bit
(ACK) or a not-acknowledge bit (NACK). Both the mas-
ter and the MAX11008 (slave) generate acknowledge
bits. To generate an acknowledge, the receiving device
must pull SDA low before the rising edge of the
acknowledge-related clock pulse (ninth clock pulse)
and keep it low during the high period of the clock
pulse (see Figure 6).
To generate a not-acknowledge condition, the receiver
allows SDA to be pulled high before the rising edge of
the acknowledge-related clock pulse, and leaves SDA
high during the high period of the clock pulse.
Monitoring the acknowledge bits allows for detection of
unsuccessful data transfers. An unsuccessful data
transfer happens if a receiving device is busy or if a
system fault has occurred. In the event of an unsuc-
cessful data transfer, the bus master reattempts com-
munication at a later time.
S
Sr
P
SDA
SCL
S = START.
Sr = REPEATED START.
P = STOP.
Figure 5. START and STOP Conditions
S
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
SCL
1
2
8
9
Figure 6. Acknowledge Bits
20
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11008BETM+ | 功能描述:射频放大器 Dual RF LDMOS Bias Controller w/NV Mem RoHS:否 制造商:Skyworks Solutions, Inc. 类型:Low Noise Amplifier 工作频率:2.3 GHz to 2.8 GHz P1dB:18.5 dBm 输出截获点:37.5 dBm 功率增益类型:32 dB 噪声系数:0.85 dB 工作电源电压:5 V 电源电流:125 mA 测试频率:2.6 GHz 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-16 封装:Reel |
| MAX11008BETM+T | 功能描述:射频放大器 Dual RF LDMOS Bias Controller w/NV Mem RoHS:否 制造商:Skyworks Solutions, Inc. 类型:Low Noise Amplifier 工作频率:2.3 GHz to 2.8 GHz P1dB:18.5 dBm 输出截获点:37.5 dBm 功率增益类型:32 dB 噪声系数:0.85 dB 工作电源电压:5 V 电源电流:125 mA 测试频率:2.6 GHz 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-16 封装:Reel |
| MAX11008EVC16 | 功能描述:放大器 IC 开发工具 MAX11008 Eval Kit RoHS:否 制造商:International Rectifier 产品:Demonstration Boards 类型:Power Amplifiers 工具用于评估:IR4302 工作电源电压:13 V to 23 V |
| MAX11008EVKIT+ | 功能描述:放大器 IC 开发工具 MAX11008 Eval Kit RoHS:否 制造商:International Rectifier 产品:Demonstration Boards 类型:Power Amplifiers 工具用于评估:IR4302 工作电源电压:13 V to 23 V |
| MAX1100CWG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
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