参数资料
型号: MAX11008BETM+
厂商: Maxim Integrated
文件页数: 24/67页
文件大小: 0K
描述: IC CTLR LDMOS BIAS DUAL 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
功能: 偏压控制器
RF 型: 手机
次要属性: 片上 4Kb EEPROM
封装/外壳: 48-WFQFN 裸露焊盘
包装: 托盘
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
12-Bit ADC
The MAX11008 12-bit ADC uses a SAR conversion
technique and on-chip track-and-hold (T/H) circuitry to
convert the PGA outputs (PGAOUT1 and PGAOUT2),
temperature measurements, and single-ended auxiliary
input voltages (ADCIN1 and ADCIN2) into 12-bit digital
data when in ADC monitor mode (see the Hardware
Configuration Register (HCFIG) (Read/Write) section).
All nontemperature measurements are converted using
a unipolar transfer function (see Figure 13), and all tem-
perature measurements are converted using a bipolar
transfer function (see Figure 14).
Analog Input T/H
Figure 12 shows the equivalent circuit for the ADC input
architecture of the MAX11008. In track mode, an input
capacitor is connected to the input signal (ADCIN1,
ADCIN2, PGAOUT1, PGAOUT2, or temperature sensor
processor output). Another input capacitor is connect-
ed to AGND. After the T/H enters hold mode, the differ-
ence between the sampled positive and negative input
voltages is converted. The charging rate of the input
capacitance determines the time required for the T/H to
acquire an input signal. If the input signal’s source
impedance is high, the required acquisition time
lengthens accordingly.
ADCIN1
Any source impedance below 300 ? does not affect the
ADC’s AC performance. A high-impedance source can
be accommodated either by lengthening t ACQ or by
placing a 1μF capacitor between the positive and neg-
ative analog inputs. The combination of the analog-
input source impedance and the capacitance at the
analog input creates an RC filter that limits the analog
input bandwidth.
Input Bandwidth
The ADC’s input-tracking circuitry has a 1MHz small-
signal bandwidth, to digitize high-speed transient
events and measure periodic signals with bandwidths
exceeding the ADC’s sampling rate by using under-
sampling techniques. Anti-alias filtering of the input sig-
nals is necessary to prevent high-frequency
components from aliasing into the frequency band of
interest.
Analog Input Protection
Internal electrostatic-discharge (ESD) protection diodes
clamp all analog inputs to AV DD and AGND, allowing
the inputs to swing from (AGND - 0.3V) to (AV DD +
0.3V) without damage. However, for accurate conver-
sions near full scale, the inputs must not exceed AV DD
by more than 50mV or be lower than AGND by 50mV. If
an analog input voltage exceeds the supplies, limit the
input current to 2mA.
REFADC
CAPACITIVE
DAC
ADCIN2
PGAOUT1
PGAOUT2
TRACK
CIN+
COMPARATOR
TEMP SENSOR READING
HOLD
AGND
TRACK
CIN-
HOLD
AV DD /2
ALL SWITCHES SHOWN IN TRACK MODE.
Figure 12. Analog Input Track and Hold
TRACK
HOLD
24
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