参数资料
型号: MAX11008BETM+
厂商: Maxim Integrated
文件页数: 66/67页
文件大小: 0K
描述: IC CTLR LDMOS BIAS DUAL 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
功能: 偏压控制器
RF 型: 手机
次要属性: 片上 4Kb EEPROM
封装/外壳: 48-WFQFN 裸露焊盘
包装: 托盘
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
Table 27. LUT Streaming Register
DATA BITS
BIT NAME
RESET STATE
FUNCTION
LUT length bits. Specifies the number of data words to be written to the
D[15:8]
LUTSL[7:0]
0
EEPROM. Up to 256 data words can be written. The actual length written is
LUTSL + 1.
D[7:0]
LUTSA[7:0]
0
LUT address bits. Specifies the starting address of the data to be written to
the EEPROM.
THD = 20 x log ? ? V 22 + V 32 + V 4 2 + V 52 + V 62 ? / V 1 ?
? ? ?
? ?
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. INL for
the MAX11008 is measured using the end-point
method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A DNL
error specification of greater than -1 LSB guarantees no
missing codes and a monotonic transfer function.
ADC Offset Error
For an ideal converter, the first transition occurs at 0.5
LSB, above zero. Offset error is the amount of deviation
between the measured first transition point and the
ideal first transition point.
ADC Gain Error
When a positive full-scale voltage is applied to the con-
verter inputs, the digital output is all ones (FFFh). The
transition from FFEh to FFFh occurs at 1.5 LSB below
full scale. Gain error is the amount of deviation between
the measured full-scale transition point and the ideal
full-scale transition point with the offset error removed.
Aperture Delay
Aperture delay (t AD ) is the time between the rising
edge of the sampling clock and the instant when an
actual sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum
analog-to-digital noise is caused by quantization error
only and results directly from the ADC’s resolution (N
bits):
SNR = (6.02 x N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is calculated by taking
the ratio of the RMS signal to the RMS noise. RMS noise
includes all spectral components to the Nyquist fre-
quency excluding the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS noise plus distortion. RMS noise plus distortion
includes all spectral components to the Nyquist fre-
quency excluding the fundamental and the DC offset:
SINAD (dB) = 20 x log (Signal RMS /Noise RMS )
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
ENOB = (SINAD - 1.76)/6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
? ? ? ?
?
where V1 is the fundamental amplitude, and V2 through
V6 are the amplitudes of the first five harmonics.
66
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